Motion estimation methods for residual prediction

US9386311B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9386311-B2
Application numberUS-201113977491-A
CountryUS
Kind codeB2
Filing dateDec 1, 2011
Priority dateDec 1, 2011
Publication dateJul 5, 2016
Grant dateJul 5, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Systems, apparatus and methods are described including determining a first value by reducing a bit-length of a reference pixel value and adding a first predetermined value to the result and determining a second value by subtracting a residual pixel value from a current pixel value to generate a difference value, reducing a bit-length of the difference value and adding the first predetermined value to the result. The range of the second value may then be clipped by setting the second value to zero when the second value is equal to or less than a second predetermined value and setting the second value to a third predetermined value when the second value is equal to or greater than a fourth predetermined value. The first value and the second value may then be used for inter-layer residual prediction in Scalable Video Coding (SVC) systems.

First claim

Opening claim text (preview).

What is claimed: 1. A computer-implemented method, comprising: at a video encoder: receiving a reference pixel value; receiving a current pixel value and a residual pixel value; determining, via a first preprocessing hardware module, a first value by reducing a bit-length of the reference pixel value and adding a first predetermined value to the result; determining, via a second preprocessing module, a second value by subtracting the residual pixel value from the current pixel value to generate a difference value, reducing a bit-length of the difference value and adding the first predetermined value to the result; setting the second value to zero when the second value is equal to or less than a second predetermined value and setting the second value to a third predetermined value when the second value is equal to or greater than a fourth predetermined value; and wherein the first value and the second value are used to perform motion estimation for inter-layer residual prediction. 2. The method of claim 1 , wherein the video encoder comprises a Scalable Video Coding (SVC) encoder, and wherein the SVC encoder is configured to perform inter-layer residual prediction. 3. The method of claim 2 , wherein the residual pixel value comprises a residual pixel value of a base layer, and wherein the reference pixel value and the current pixel value comprise pixel values of an enhancement layer. 4. The method of claim 1 , wherein reducing the bit-length of the reference pixel value comprises right shifting the reference pixel value, and wherein reducing the bit-length of the difference value comprises right shifting the difference value. 5. The method of claim 4 , wherein right shifting the reference pixel value comprises right shifting the reference pixel value by one, and wherein right shifting the difference value comprises right shifting the difference value by one. 6. The method of claim 1 , wherein the reference pixel value and the current pixel value comprise eight-bit values, and wherein the residual pixel value comprises a nine-bit value. 7. The method of claim 6 , wherein the first predetermined value comprises sixty-four, wherein the second predetermined value comprises minus one hundred twenty-eight, wherein the third predetermined value comprises two hundred fifty-five, and wherein the fourth predetermined value comprises three hundred eighty-three. 8. An article comprising a non-transitory computer program product having stored therein instructions that, if executed, result in: at an video encoder: receiving a reference pixel value; receiving a current pixel value and a residual pixel value; determining, via a first preprocessing hardware module, a first value by reducing a bit-length of the reference pixel value and adding a first predetermined value to the result; determining, via a second preprocessing module, a second value by subtracting the residual pixel value from the current pixel value to generate a difference value, reducing a bit-length of the difference value and adding the first predetermined value to the result; setting the second value to zero when the second value is equal to or less than a second predetermined value and setting the second value to a third predetermined value when the second value is equal to or greater than a fourth predetermined value; and wherein the first value and the second value are used to perform motion estimation for inter-layer residual prediction. 9. The article of claim 8 , wherein the video encoder comprises a Scalable Video Coding (SVC) encoder, and wherein the SVC encoder if configured to perform inter-layer residual prediction. 10. The article of claim 9 , wherein the residual pixel value comprises a residual pixel value of a base layer, and wherein the reference pixel value and the current pixel value comprise pixel values of an enhancement layer. 11. The article of claim 8 , wherein reducing the bit-length of the reference pixel value comprises right shifting the reference pixel value, and wherein reducing the bit-length of the difference value comprises right shifting the difference value. 12. The article of claim 8 , wherein the reference pixel value and the current pixel value comprise eight-bit values, and wherein the residual pixel value comprises a nine-bit value. 13. An apparatus, comprising: a processor configured to: receive a reference pixel value; receive a current pixel value and a residual pixel value; determine, via a first preprocessing hardware module, a first value by reducing bit-length of the reference pixel value and adding a first predetermined value to the result; determine, via a second preprocessing hardware module, a second value by subtracting the residual pixel value from the current pixel value to generate a difference value, reducing a bit-length of the difference value and adding the first predetermined value to the result; set the second value to zero when the second value is equal to or less than a second predetermined value and set the second value to a third predetermined value when the second value is equal to or greater than a fourth predetermined value; and wherein the first value and the second value are used to perform motion estimation for inter-layer residual prediction. 14. The apparatus of claim 13 , wherein the processor is configured to implement a Scalable Video Coding (SVC) encoder and to perform inter-layer residual prediction. 15. The apparatus of claim 14 , wherein the residual pixel value comprises a residual pixel value of a base layer, and wherein the reference pixel value and the current pixel value comprise pixel values of an enhancement layer. 16. The apparatus of claim 13 , wherein the processor is configured to reduce the bit-length of the reference pixel value by right shifting the reference pixel value, and wherein the processor is configured to reduce the bit-length of the difference value by right shifting the difference value. 17. The apparatus of claim 13 , wherein the reference pixel value and the current pixel value comprise eight-bit values, and wherein the residual pixel value comprises a nine-bit value. 18. A system comprising: a antenna to transmit encoded video data; and a video encoder, wherein the video encoder is communicatively coupled to the antenna and wherein the video encoder is to generate the encoded video data by, at least in part: receiving a reference pixel value; receiving a current pixel value and a residual pixel value; determining, via a first preprocessing hardware module, a first value by reducing a bit-length of the reference pixel value and adding a first predetermined value to the result; determining, via a second preprocessing module, a second value by subtracting the residual pixel value from the current pixel value to generate a difference value, reducing a bit-length of the difference value and adding the first predetermined value to the result; setting the second value to zero when the second value is equal to or less than a second predetermined value and setting the second value to a third predetermined value when the second value is equal to or greater than a fourth predetermined value; and wherein the first value and the second value are used to perform motion estimation for inter-layer residual prediction. 19. The system of claim 18 , wherein the video encoder comprises a Scalable Video Coding (SVC) encoder, and wherein the SVC encoder is to perform inter-layer residual prediction. 20. The system of claim 19 , wherein the residual p

Assignees

Inventors

Classifications

  • the unit being bits, e.g. of the compressed video stream · CPC title

  • Hardware specially adapted for motion estimation or compensation · CPC title

  • Sampling, masking or truncation of coding units, e.g. adaptive resampling, frame skipping, frame interpolation or high-frequency transform coefficient masking · CPC title

  • using hierarchical techniques, e.g. scalability (H04N19/63 takes precedence) · CPC title

  • by compressing encoding parameters before transmission · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9386311B2 cover?
Systems, apparatus and methods are described including determining a first value by reducing a bit-length of a reference pixel value and adding a first predetermined value to the result and determining a second value by subtracting a residual pixel value from a current pixel value to generate a difference value, reducing a bit-length of the difference value and adding the first predetermined va…
Who is the assignee on this patent?
Lee Sang-Hee, Fu Fangwen, Lei Zhijun, and 1 more
What technology area does this patent fall under?
Primary CPC classification H04N19/51. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).