Power amplifier with wide band AM-AM feedback and digital pre-distortion

Patent metadata

Field	Value
Publication number	US-9385666-B2
Application number	US-201414558805-A
Country	US
Kind code	B2
Filing date	Dec 3, 2014
Priority date	Dec 9, 2013
Publication date	Jul 5, 2016
Grant date	Jul 5, 2016

Abstract

A system including an amplifier circuit configured to amplify an input and generate an output, a bias circuit configured to bias the amplifier circuit, and a feedback circuit configured to generate feedback based on the input and the output, and to adjust the bias of the amplifier circuit based on the feedback to reduce amplitude nonlinearity in the output. A digital pre-distortion circuit is configured to reduce phase nonlinearity in the output.

First claim

What is claimed is:

1. A system comprising:
an amplifier circuit configured to amplify an input and generate a first output;
a bias circuit configured to bias the amplifier circuit;
a feedback circuit configured to
generate feedback based on the input and the first output, and
adjust a bias of the amplifier circuit based on the feedback to reduce amplitude nonlinearity in the first output,
wherein the feedback circuit comprises:
an operational transconductance amplifier configured to receive the input and the first output and generate a second output; and
a transimpedance amplifier configured to receive the second output and generate a third output to adjust the bias of the amplifier circuit; and

a digital pre-distortion circuit configured to reduce phase nonlinearity in the first output.

2. The system of claim 1 , wherein:
the amplifier circuit comprises
a pre-amplifier configured to amplify the input and generate a second output; and
a power amplifier configured to amplify the second output and generate the first output;

the bias circuit is configured to bias the amplifier circuit by biasing the power amplifier; and
the feedback circuit is configured to adjust the bias of the amplifier circuit by adjusting the bias of the power amplifier.

3. The system of claim 1 , wherein the digital pre-distortion circuit is configured to reduce residual phase nonlinearity generated by the feedback circuit in the first output.

4. The system of claim 1 , wherein the digital pre-distortion circuit is configured to reduce residual amplitude nonlinearity in the first output.

5. The system of claim 1 , wherein:
the operational transconductance amplifier comprises a comparator configured to compare amplitude information of the input and the first output and to generate current based on the comparison, and
the transimpedance amplifier is configured to generate the second output based on the current.

6. The system of claim 1 , wherein the operational transconductance amplifier comprises:
a current source; and
first through sixth transistors each including a source terminal, a gate terminal, and a drain terminal;
wherein the source terminals of the first through fourth transistors are connected to the current source;
wherein the gate terminals of the first and second transistors are connected to the input;
wherein the gate terminals of the third and fourth transistors are connected to the first output;
wherein the drain terminals of the first and second transistors are connected to the drain terminal of the fifth transistor and a first input of the transimpedance amplifier;
wherein the drain terminals of the third and fourth transistors are connected to the drain terminal of the sixth transistor and a second input of the transimpedance amplifier;
wherein the source terminals of the fifth and sixth transistors are connected to a power supply;
wherein the gate terminal of the fifth transistor is connected to the gate terminal of the sixth transistor;
wherein a first resistance including first and second terminals respectively connected to the drain and gate terminals of the fifth transistor; and
wherein a second resistance including first and second terminals respectively connected to the drain and gate terminals of the sixth transistor.

7. The system of claim 5 , wherein the operational transconductance amplifier comprises a folded cascode stage coupled to the comparator to generate the current.

8. The system of claim 1 , wherein the operational transconductance amplifier comprises:
a current source; and
first through twelfth transistors each including a source terminal, a gate terminal, and a drain terminal;
wherein the source terminals of the first through fourth transistors are connected to the current source;
wherein the gate terminals of the first and second transistors are connected to the input;
wherein the gate terminals of the third and fourth transistors are connected to the first output;
wherein the drain terminals of the first and second transistors are connected to the drain terminal of the fifth transistor;
wherein the drain terminals of the third and fourth transistors are connected to the drain terminal of the sixth transistor;
wherein the source terminals of the fifth and sixth transistors are connected to a power supply and the source terminal of the seventh transistor;
wherein the gate terminals of the fifth, seventh, ninth, and eleventh transistors are respectively connected to the gate terminals of the sixth, eighth, tenth, and twelfth transistors;
wherein the drain terminals of the fifth and sixth transistors are respectively connected to the source terminals of the seventh and eighth transistors;
wherein the drain terminals of the seventh and eight transistors are respectively connected to (i) the drain terminals of the ninth and tenth transistors and (ii) first and second inputs of the transimpedance amplifier; and
wherein source terminals of the ninth and tenth transistors are respectively connected to the drain terminals of the eleventh and twelfth transistors.

9. A system comprising:
an amplifier circuit configured to amplify an input and generate a first output;
a bias circuit configured to bias the amplifier circuit;
a feedback circuit configured to
generate feedback based on the input and the first output, and
adjust a bias of the amplifier circuit based on the feedback to reduce amplitude nonlinearity in the first output,

wherein the feedback circuit comprises:
a first self-mixer configured to receive the input and generate a second output;
a second self-mixer configured to receive the first output and generate a third output; and
a transimpedance amplifier configured to receive the second output and the third output and generate a fourth output to adjust the bias of the amplifier circuit; and

a digital pre-distortion circuit configured to reduce phase nonlinearity in the first output.

10. A method comprising:
amplifying an input using an amplifier circuit;
generating a first output based on amplifying the input;
biasing the amplifier circuit;
generating feedback based on the input and the first output;
adjusting a bias of the amplifier circuit based on the feedback to reduce amplitude nonlinearity in the first output,
wherein generating feedback and adjusting the bias of the amplifier circuit based on the feedback includes:
generating a second output based on the input and the first output using an operational transconductance amplifier;
generating a third output based on the second output using a transimpedance amplifier; and
adjusting the bias of the amplifier circuit using the third output; and

reducing phase nonlinearity in the first output.

11. The method of claim 10 , further comprising:
amplifying the input using a pre-amplifier;
generating a second output based on amplifying the input using the pre-amplifier;
amplifying the second output using a power amplifier;
generating the first output based on amplifying the second output using the power amplifier;
biasing the amplifier circuit by biasing the power amplifier; and
adjusting the bias of the amplifier circuit by adjusting the bias of the power amplifier.

12. The method of claim 10 , further comprising reducing residual phase nonlinearity generated by the feedback in the first output.

13. The method of claim 10 , further comprising reducing residual amplitude nonlinearity in the first output.

14. The method of claim 10 , further comprising:
comparing amplitude information of the input and the first output;
generating current based on the comparison; and
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Assignees

• Marvell World Trade Ltd

Inventors

• Tam Sai-Wang
• Wong Alden Chee Ho
• Lu Yuan
• Signoff David M
• Lin Li

Classifications

• H03F3/21

  with semiconductor devices only {(H03F3/245 takes precedence)} · CPC title

• H03F1/0216

  Continuous control · CPC title

• H03F1/0272

  by using a signal derived from the output signal · CPC title

• H03F1/0266

  by using a signal derived from the input signal · CPC title

• H03F2200/129

  there being a feedback over the complete amplifier · CPC title