Nonvolatile memory device using semiconductor nanocrystals and method of forming same
US-8987138-B2 · Mar 24, 2015 · US
Silicon dot formation by self-assembly method and selective silicon growth for flash memory
US9385136B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9385136-B2 |
| Application number | US-201514745568-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 22, 2015 |
| Priority date | Aug 23, 2013 |
| Publication date | Jul 5, 2016 |
| Grant date | Jul 5, 2016 |
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Abstract
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Some embodiments of the present disclosure relate to a method that achieves a substantially uniform pattern of discrete storage elements within a memory cell. A copolymer solution having first and second polymer species is spin-coated onto a surface of a substrate and subjected to self-assembly into a phase-separated material having a regular pattern of micro-domains of the second polymer species within a polymer matrix having the first polymer species. The second polymer species is then removed resulting with a pattern of holes within the polymer matrix. An etch is then performed through the holes utilizing the polymer matrix as a hard-mask to form a substantially identical pattern of holes in a dielectric layer disposed over a seed layer disposed over the substrate surface. Epitaxial deposition onto the seed layer then utilized to grow a substantially uniform pattern of discrete storage elements within the dielectric layer.
First claim
Opening claim text (preview).
What is claimed is: 1. A memory device, comprising: a semiconductor substrate; a first dielectric layer disposed over the semiconductor substrate; a plurality of quantum dots disposed onto and in direct contact with the first dielectric layer, wherein the plurality of quantum dots have substantially cylindrical shapes; a second dielectric layer that is arranged vertically over the plurality of quantum dots, and that abuts an upper surface of the first dielectric layer; and…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9385136B2 cover?
- Some embodiments of the present disclosure relate to a method that achieves a substantially uniform pattern of discrete storage elements within a memory cell. A copolymer solution having first and second polymer species is spin-coated onto a surface of a substrate and subjected to self-assembly into a phase-separated material having a regular pattern of micro-domains of the second polymer speci…
- Who is the assignee on this patent?
- Taiwan Semiconductor Mfg Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H10D30/0411. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jul 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).