Semiconductor component of semiconductor chip size with flip-chip-like external contacts

US9385008B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9385008-B2
Application numberUS-201113038577-A
CountryUS
Kind codeB2
Filing dateMar 2, 2011
Priority dateJul 24, 2003
Publication dateJul 5, 2016
Grant dateJul 5, 2016

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor component and a method for its production in semiconductor chip size, can have a semiconductor chip, which has external contacts of the semiconductor component that are arranged in the manner of a flip-chip on its active upper side. The semiconductor chip can be encapsulated by a plastic compound at least on its rear side and its side edges. The outer contacts, which can be arranged on external contact connecting areas, can project from the active upper side.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor component blank comprising: an auxiliary carrier defining a plurality of component positions arranged in rows and columns on the auxiliary carrier, wherein the auxiliary carrier includes a first carrier surface and a second carrier surface opposite the first carrier surface; and a plurality of semiconductor components, wherein each semiconductor component comprises a semiconductor chip including: an active upper side, a rear side, a first side edge, and a second side edge, a plurality of solder balls disposed on the active upper side such that the solder balls project from the active upper side of the semiconductor chip to orient the active upper side in spaced relation from the auxiliary carrier, and a separate lead-free solder deposit disposed around a portion of each solder ball such that each separate solder deposit is spaced apart from the active upper side by the corresponding solder ball, each separate solder deposit coupling one of the solder balls to the first carrier surface of the auxiliary carrier, wherein the semiconductor chip is encapsulated by a plastic compound on at leak the rear side, the first side edge, and the second side edge, and wherein the solder balls and the separate solder deposits are embedded in the same plastic compound as the semiconductor chip such that an exposed external surface of each separate solder deposit is coplanar with a surface of the plastic compound and each f the solder balls is encased within the plastic compound. 2. The semiconductor component blank of claim 1 , wherein the semiconductor chips are spaced apart at dimensions corresponding to at least twice a saw blade thickness of a saw blade for dividing the blank into individual semiconductor components. 3. The semiconductor component blank of claim 1 , wherein the auxiliary carrier comprises a metal layer. 4. The semiconductor component blank of claim 1 , wherein: the plastic compound is a cured compound; and the blank is a self-supporting composite board. 5. The semiconductor component blank of claim 1 , wherein: the active upper side of the semiconductor defines a plurality of external contact connecting areas; each of the plurality of solder balls is disposed on an associated external contact connecting area; and the semiconductor chips are arranged in component positions such that spacing between adjacent semiconductor chips corresponds to at least twice a saw blade width required to separate the semiconductor components. 6. The semiconductor component blank of claim 1 , wherein the auxiliary carrier is separable from the blank. 7. The semiconductor component blank of claim 1 , wherein the auxiliary carrier is configured to short-circuit the solder balls. 8. The semiconductor component blank of claim 1 , wherein the plastic compound is an epoxy resin. 9. The semiconductor component blank of claim 1 , wherein: the auxiliary carrier is separable from the blank; the plastic compound is an epoxy resin, and the plastic compound encapsulates the semiconductor chip active upper side, entire rear side, and side edges. 10. The semiconductor component blank of claim 9 , wherein: the auxiliary carrier comprises a metal layer; the plastic compound is a cured compound; and the blank is self-supporting. 11. The semiconductor component blank of claim 1 , wherein the solder balls are formed from a gold alloy and wherein the solder deposits are formed from a lead-free tin alloy. 12. A semiconductor blank comprising: an auxiliary carrier having a first carrier side and a second carrier side opposite the first carrier side; a semiconductor chip including: a first chip surface and a second chip surface, and a plurality of solder balls disposed on th first chip surface, wherein each of the plurality of solder balls is individually connected to the first carrier side of the auxiliary carrier with a separate lead-free solder deposit; and a plastic compound of a single, continuous construction encapsulating the semiconductor chip, wherein the auxiliary carrier is separably coupled to the blank, the auxiliary carrier comprises a metal layer, the plastic compound is an epoxy resin, and the plastic compound encapsulates the semiconductor chip active upper side, entire rear side, and side edges such that an exposed external surface of each separate solder deposit is coplanar with a surface of the plastic compound. 13. The semiconductor blank of claim 12 , wherein the plastic compound comprises a cured compound that produces a self-supporting composite board on the auxiliary carrier. 14. The semiconductor component blank of claim 12 , wherein: the first surface of the auxiliary carrier defines a plurality of component positions arranged in rows and columns on the auxiliary carrier; the semiconductor chip comprises a plurality of semiconductor chips, each semiconductor chip being disposed within an associated component position; and the plastic compound is an epoxy resin encapsulating the semiconductor chips, and at least a portion of each solder deposit. 15. The semiconductor blank of claim 12 , wherein the solder balls are formed from a gold alloy and wherein the solder deposits are formed from a lead-free tin alloy. 16. A semiconductor blank comprising: an auxiliary carrier having a first carrier side and a second carrier side opposite the first carrier side; a semiconductor chip including: a first chip surface and a second chip surface, and a plurality of solder balls disposed on the first chip surface, wherein each of the plurality of solder balls is individually coupled to the first carrier side of the auxiliary carrier with a separate lead-free solder deposit; and a plastic compound of a single, continuous construction encapsulating the semiconductor chip, wherein each of the separate solder deposits is embedded in the plastic compound such that a surface of each separate solder deposit facing away from the semiconductor chip is coplanar with a surface of the same plastic compound encapsulating the semiconductor chip. 17. The semiconductor blank of claim 16 , wherein the auxiliary carrier comprises a metal layer. 18. The semiconductor blank of claim 17 , wherein the metal layer short-circuits the solder balls. 19. The semiconductor blank of claim 17 , wherein: the semiconductor chips are oriented at individual component positions along the auxiliary carrier; and the plastic compound encapsulates the semiconductor chip and the solder balls. 20. The semiconductor blank of claim 16 , wherein the solder balls are formed from a gold alloy and wherein the solder deposits are formed from a lead-free tin alloy.

Assignees

Inventors

Classifications

  • relative to the surface, e.g. recessed, protruding · CPC title

  • with redistribution layers [RDL] · CPC title

  • characterised by changes in properties of the bump connectors during connecting · CPC title

  • relative to underlying supporting features, e.g. bond pads, RDLs or vias · CPC title

  • Bond pads having multiple stacked layers · CPC title

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Frequently asked questions

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What does patent US9385008B2 cover?
A semiconductor component and a method for its production in semiconductor chip size, can have a semiconductor chip, which has external contacts of the semiconductor component that are arranged in the manner of a flip-chip on its active upper side. The semiconductor chip can be encapsulated by a plastic compound at least on its rear side and its side edges. The outer contacts, which can be arra…
Who is the assignee on this patent?
Kiendl Helmut, Theuss Horst, Weber Michael, and 1 more
What technology area does this patent fall under?
Primary CPC classification H10W74/014. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).