Multi-level voltage detector
US-2024069073-A1 · Feb 29, 2024 · US
US9383391B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9383391-B2 |
| Application number | US-201414251195-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 11, 2014 |
| Priority date | Apr 11, 2014 |
| Publication date | Jul 5, 2016 |
| Grant date | Jul 5, 2016 |
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A voltage sensing circuit is provided. The voltage sensing circuit includes two differential amplifiers and a buffer. The first differential amplifier receives a first input voltage and a first reference voltage and provides a first current and a second current according to the difference between the first input voltage and the first reference voltage. The second differential amplifier receives a second input voltage and a second reference voltage and provides a third current and a fourth current according to the difference between the second input voltage and the second reference voltage. The buffer is coupled to the two differential amplifiers. The buffer generates an output voltage based on the first current, the second current, the third current, and the fourth current.
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What is claimed is: 1. A voltage sensing circuit, comprising: a first differential amplifier receiving a first input voltage and a first reference voltage and providing a first current and a second current according to a difference between the first input voltage and the first reference voltage; a second differential amplifier receiving a second input voltage and a second reference voltage and providing a third current and a fourth current according to a difference between the second input voltage and the second reference voltage; and a buffer coupled to the first differential amplifier and the second differential amplifier and generating an output voltage based on the first current, the second current, the third current, and the fourth current, wherein the buffer generates the output voltage based on a pull-up current received by an input end of the buffer and a pull-down current provided by the input end of the buffer, the pull-up current is equal to the second current plus the fourth current, and the pull-down current is equal to the first current plus the third current. 2. The voltage sensing circuit of claim 1 , wherein a difference between the second current and the first current is directly proportional to the difference between the first input voltage and the first reference voltage, and a difference between the third current and the fourth current is directly proportional to the difference between the second input voltage and the second reference voltage. 3. The voltage sensing circuit of claim 2 , wherein the first differential amplifier comprises: a first transistor, a gate of the first transistor receiving the first reference voltage and a drain of the first transistor providing the first current; a second transistor, a gate of the second transistor receiving the first input voltage and a drain of the second transistor providing the second current; and a first current source coupled between sources of the first transistor and the second transistor and a ground; and wherein the second differential amplifier comprises: a third transistor, a gate of the third transistor receiving the second reference voltage and a drain of the third transistor providing the third current; a fourth transistor, a gate of the fourth transistor receiving the second input voltage and a drain of the fourth transistor providing the fourth current; and a second current source coupled between a power supply voltage and sources of the third transistor and the fourth transistor. 4. The voltage sensing circuit of claim 1 , further comprising: a first current mirror coupled to the first differential amplifier and providing a fifth current according to the first current; a second current mirror coupled to the first current mirror and providing a sixth current according to the fifth current; a third current mirror coupled to the first differential amplifier and providing a seventh current according to the second current; a fourth current mirror coupled to the second differential amplifier and providing an eighth current according to the third current; a fifth current mirror coupled to the second differential amplifier and providing a ninth current according to the fourth current; and a sixth current mirror coupled to the fifth current mirror and providing a tenth current according to the ninth current; wherein the pull-up current comprises the seventh current and the tenth current, and the pull-down current comprises the sixth current and the eighth current. 5. The voltage sensing circuit of claim 1 , wherein the output voltage rises up when the pull-up current is larger than the pull-down current, and the output voltage falls down when the pull-up current is smaller than the pull-down current. 6. The voltage sensing circuit of claim 1 , wherein the output voltage falls down to a ground voltage when a difference between the first input voltage and the second input voltage is smaller than a difference between the first reference voltage and the second reference voltage, and the output voltage rises up to a power supply voltage when the difference between the first input voltage and the second input voltage is larger than the difference between the first reference voltage and the second reference voltage. 7. The voltage sensing circuit of claim 1 , wherein the first input voltage and the second input voltage are differential input voltages of an analog-to-digital converter, and the first reference voltage and the second reference voltage define a valid range of a difference between the differential input voltages of the analog-to-digital converter.
Structural combination of electric measuring instruments with basic electronic circuits, e.g. with amplifier · CPC title
Measuring voltage only · CPC title
Means for adapting the input signal to the range the converter can handle, e.g. limiting, pre-scaling (H03M1/18 takes precedence); Out-of-range indication · CPC title
Measuring sum, difference or ratio · CPC title
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