Laterally coupled isolator devices

Patent metadata

Field	Value
Publication number	US-9380705-B2
Application number	US-201313803826-A
Country	US
Kind code	B2
Filing date	Mar 14, 2013
Priority date	Mar 14, 2013
Publication date	Jun 28, 2016
Grant date	Jun 28, 2016

Abstract

A laterally coupled isolator includes a pair of isolator traces provided in a common dielectric layer and separated by a distance that defines the isolation strength of the system. Circuit designers can vary the lateral distance to tailor isolation rating to suit individual design needs. A second embodiment includes a semiconductor substrate, provided below the isolator traces that includes a communication circuit electrically coupled to one of the isolator devices.

First claim

I claim:

1. An isolator system, comprising:
first and second isolator traces provided on a common dielectric layer within a first distance apart from each other,
a first communication circuit electrically coupled to the first isolator trace,
a second communication circuit electrically coupled to the second isolator trace,
wherein electrical connections between the first communication circuit and the first isolator trace and between the second communication circuit and the second isolator trace are provided on the common dielectric layer,
wherein the common dielectric layer is fabricated over a semiconductor substrate.

2. The isolator system of claim 1 , further comprising a plurality of intermediate layers provided between the common dielectric layer and the semiconductor substrate.

3. The isolator system of claim 1 , further comprising a metallization layer provided between the common dielectric layer and the semiconductor substrate.

4. The isolator system of claim 1 , further comprising an insulator substrate layer provided between the common dielectric layer and the semiconductor substrate.

5. The isolator system of claim 1 , wherein the first and second isolator traces are encased in dielectric material having a length from the traces to an exterior edge of the dielectric material at least half the first distance.

6. The isolator system of claim 1 , wherein the first and second isolator traces are capacitively coupled.

7. The isolator system of claim 1 , wherein the first and second isolator traces are inductively coupled.

8. The isolator system of claim 1 , wherein the first communication circuit is fabricated on the semiconductor substrate below the first and second traces.

9. The isolator system of claim 1 , wherein the first communication circuit is provided on a common first package as the first and second isolator traces, and the second communication circuit is provided in a second package, separate from the first package.

10. The isolator system of claim 1 , wherein the first communication circuit, the first and second isolator traces, and the second communication circuit are provided in separate packages from each other.

11. The isolator system of claim 1 , wherein the first and second communication circuits are bidirectional communication circuits.

12. The isolator system of claim 1 , wherein the first and second communication circuits are unidirectional communication circuits.

13. An isolator system, comprising:
first and second isolator traces provided on a common dielectric layer within a first distance apart from each other,
a semiconductor substrate provided below the common layer,
a first communication circuit provided within the semiconductor substrate and below at least a portion of the first or second isolator traces, the first communication circuit electrically coupled to the first isolator trace.

14. The isolator system of claim 13 , wherein one of the first and second isolator traces surrounds a periphery of the other of the first and second isolator traces.

15. The isolator system of claim 13 , further comprising a post extending through dielectric layers separating the semiconductor substrate from the common layer, connecting the first communication circuit to the first isolator trace.

16. The isolator system of claim 13 , wherein the first and second isolator traces are capacitively coupled.

17. The isolator system of claim 13 , wherein the first and second isolator traces are inductively coupled.

18. The isolator system of claim 13 , wherein the first and second communication circuits are bidirectional communication circuits.

19. The isolator system of claim 13 , wherein the first and second communication circuits are unidirectional communication circuits.

20. The isolator system of claim 13 , further comprising a second communication circuit provided in a first package separate from a second package which includes the first communication circuit and the first and second isolator traces.

21. The isolator system of claim 1 , wherein the first communication circuit is fabricated over a second semiconductor substrate, and the second communication circuit is fabricated over a third semiconductor substrate.

22. The isolator system of claim 1 , wherein the isolator traces are fabricated over an insulator substrate.

23. An isolator system, comprising:
a first communication circuit provided on a first semiconductor substrate;
a second communication circuit;
an isolator circuit provided on a second semiconductor substrate, the isolator circuit including first and second isolator traces provided on a common dielectric layer within a first distance apart from each other,
wherein the first communication circuit is electrically coupled to the first isolator trace, and the second communication circuit is electrically coupled to the second isolator trace,
wherein the common dielectric layer is fabricated over the second semiconductor substrate.

24. The isolator system of claim 23 , wherein the second communication circuit is provided on a third semiconductor substrate.

25. The isolator system of claim 23 , wherein the second communication circuit is provided on the second semiconductor substrate.

26. The isolator system of claim 23 , wherein the second communication circuit and the isolator circuit are provided in a common package.

27. The isolator system of claim 23 , further comprising a metallization layer provided between the common dielectric layer and the second semiconductor substrate.

28. The isolator system of claim 23 , further comprising an insulator substrate layer provided between the common dielectric layer and the second semiconductor substrate.

29. The isolator system of claim 23 , wherein the first and second isolator traces are encased in dielectric material having a length from the traces to an exterior edge of the dielectric material at least half the first distance.

30. The isolator system of claim 23 , wherein the isolator traces are provided on top of an insulator substrate.

31. The isolator system of claim 23 , wherein the first and second isolator traces are capacitively coupled.

32. The isolator system of claim 23 , wherein the first and second isolator traces are inductively coupled.

33. The isolator system of claim 23 , wherein the first and second communication circuits are bidirectional communication circuits.

Assignees

• Analog Devices Inc

Inventors

• Chen Baoxing

Classifications

• H05K1/181 Primary

  associated with surface mounted components · CPC title

• H01G4/33

  Thin- or thick-film capacitors {(thin- or thick-film circuits; capacitors without a potential-jump or surface barrier specially adapted for integrated circuits, details thereof, multistep manufacturing processes therefor)} · CPC title

• H05K1/18

  structurally associated with non-printed electric components (H05K1/16 takes precedence) · CPC title

• H05K1/0306

  Inorganic insulating substrates, e.g. ceramic, glass · CPC title

• H10W90/753

  between laterally-adjacent chips · CPC title