Semiconductor light emitting device, manufacturing method thereof, and semiconductor light emitting device package using the same

Patent metadata

Field	Value
Publication number	US-9379288-B2
Application number	US-201514615116-A
Country	US
Kind code	B2
Filing date	Feb 5, 2015
Priority date	Oct 19, 2007
Publication date	Jun 28, 2016
Grant date	Jun 28, 2016

Abstract

There is provided a semiconductor light emitting device comprising a semiconductor stack having first and second main surfaces opposing each other, and comprising first and second conductivity-type semiconductor layers respectively defining the first and second main surfaces, and an active layer interposed between the first and second conductivity-type semiconductor layers; a plurality of contact holes penetrating the second conductivity-type semiconductor layer and the active layer, and one region of the first conductivity-type semiconductor layer; a first electrode layer disposed on the second main surface of the semiconductor stack, the first electrode layer extending and being connected to the one region of the first conductivity-type semiconductor layer through the contact holes; a second electrode layer disposed between the semiconductor stack and the first electrode layer and connected to the second conductivity-type semiconductor layer; and first and second interconnected bumps.

First claim

What is claimed is:

1. A semiconductor light emitting device comprising:
a semiconductor stack having first and second main surfaces opposing each other, and comprising first and second conductivity-type semiconductor layers respectively defining the first and second main surfaces, and an active layer interposed between the first and second conductivity-type semiconductor layers;
a plurality of contact holes penetrating the second conductivity-type semiconductor layer and the active layer;
a first electrode layer disposed on the second main surface of the semiconductor stack, the first electrode layer extending and being connected to one region of the first conductivity-type semiconductor layer through the contact holes;
a second electrode layer disposed between the semiconductor stack and the first electrode layer and connected to the second conductivity-type semiconductor layer; and
first and second interconnected bumps comprising:
first and second under bump metallurgy (UBM) layers respectively connected to the first and second electrode layers;
first and second intermetallic compound (IMC) layers respectively disposed on the first and the second UBM layers;
first and second solder bumps respectively disposed on the first and second IMC layers,

wherein the solder bumps are bonded to the UBM layers by the IMC layers; and first and second barrier layers covering lateral surfaces of the first and second UBM layers respectively,
wherein the first and second interconnected bumps are disposed opposite to the first main surface.

2. The semiconductor light emitting device of claim 1 , further comprising an insulator disposed between the first electrode layer and second electrode layer.

3. The semiconductor light emitting device of claim 1 , wherein the contact holes penetrate the second electrode layer to thereby be connected to the first electrode layer.

4. The semiconductor light emitting device of claim 1 , further comprising:
a support substrate disposed on the first electrode layer; and
first and second conductive vias respectively connected to the first and second interconnected bumps,
wherein the first conductive via penetrates the support substrate to thereby be connected to the first electrode layer, and the second conductive via penetrates the support substrate and the first electrode layer to thereby be connected to the second electrode layer.

5. The semiconductor light emitting device of claim 4 , further comprising first and second electrode pads respectively connected to the first and second conductive vias, wherein the electrode pads are interposed between the conductive vias and the interconnected bumps.

6. The semiconductor light emitting device of claim 4 , further comprising an insulator, covering lateral surfaces of the first and second conductive vias and a portion of a bottom surface of the support substrate, and exposing bottom surfaces of the first and second conductive vias.

7. The semiconductor light emitting device of claim 1 , wherein an irregular pattern is formed on a surface of the first conductivity-type semiconductor layer opposite to another surface of the first conductivity-type semiconductor layer interfacing with the active layer.

8. The semiconductor light emitting device of claim 1 , wherein the barrier layers have lower wettability to the IMC layers and the solder bumps than the UBM layers.

9. The semiconductor light emitting device of claim 1 , wherein the barrier layers comprise oxide layers containing at least one component constituting the UBM layers.

10. The semiconductor light emitting device of claim 1 , wherein the lateral surfaces of the UBM layers are inclined with respect to the second main surface.

11. The semiconductor light emitting device of claim 1 , wherein the lateral surfaces of the UBM layers are perpendicular to the second main surface.

12. A semiconductor light emitting device having a first conductivity-type semiconductor layer, an active layer, a second conductivity-type semiconductor layer, a second electrode layer, a multilayered reflective structure, a first electrode layer, and a support substrate sequentially laminated, wherein:
the second electrode layer has an exposed area at the interface between the second electrode layer and the second conductivity-type semiconductor layer;
the first electrode layer comprises at least one contact hole electrically connected to the first conductivity-type semiconductor layer, electrically insulated from the second conductivity-type semiconductor layer and the active layer, and extending from one surface of the first electrode layer to at least part of the first conductivity-type semiconductor layer; and
the multilayered reflective structure covering lateral surfaces of the at least one contact hole located between the at least one contact hole and the active layer, and the multilayered reflective structure exposing bottom surfaces of the at least one contact hole, wherein the multilayered reflective structure comprises a plurality of insulating layers, and wherein the plurality of insulating layers having different refractive indices are alternately stacked.

13. The semiconductor light emitting device of claim 12 , further comprising an electrode pad unit formed at the exposed area of the second electrode layer.

14. The semiconductor light emitting device of claim 12 , wherein the exposed area of the second electrode layer is formed at the edge of the semiconductor light emitting device.

15. The semiconductor light emitting device of claim 12 , wherein an irregular pattern is formed on the surface of the first conductivity-type semiconductor layer.

16. The semiconductor light emitting device of claim 12 , wherein the multilayered reflective structure is a distributed Bragg reflector (DBR) comprising first and second insulating layers, and wherein the first and second insulating layer having different refractive indices from each other are alternately stacked.

17. The semiconductor light emitting device of claim 12 , wherein each of the plurality of insulating layers is composed of one selected from the group consisting of silicon oxide, silicon nitride, aluminum oxide, hafnium oxide, titanium dioxide, zirconium oxide, and combinations thereof.

18. A semiconductor light emitting device having a first conductivity-type semiconductor layer, an active layer, a second conductivity-type semiconductor layer, a second electrode layer, a multilayered reflective structure, a first electrode layer, and a support substrate sequentially laminated, wherein:
the second electrode layer has an exposed area at the interface between the second electrode layer and the second conductivity-type semiconductor layer;
the first electrode layer comprises at least one contact hole electrically connected to the first conductivity-type semiconductor layer, electrically insulated from the second conductivity-type semiconductor layer and the active layer, and extending from one surface of the first electrode layer to at least part of the first conductivity-type semiconductor layer;
the multilayered reflective structure disposed between the first electrode layer and the active layer, covering lateral surfaces of the at least one contact hole and exposing bottom surfaces of the at least one contact hole, wherein the multilayered reflective structure comprises a plurality of insulating layers, and wherein the plurality of insulating layers having different refractive indices are alternately stacked; and
the exposed area of the second electrode layer is a region exposed by a via

Assignees

• Samsung Electronics Co Ltd

Inventors

• Choi Pun Jae
• Sim Jae In
• Hwang Seok Min
• Lee Jin Hyun
• Cho Myong Soo
• Park Ki Yeol

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W72/5363

  the connected ends being wedge-shaped · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W72/536

  the connected ends being ball-shaped · CPC title