Semiconductor device

Patent metadata

Field	Value
Publication number	US-9379224-B2
Application number	US-201114240883-A
Country	US
Kind code	B2
Filing date	Aug 30, 2011
Priority date	Aug 30, 2011
Publication date	Jun 28, 2016
Grant date	Jun 28, 2016

Abstract

A semiconductor device in which a diode region and an IGBT region are formed on a same semiconductor substrate is provided. The diode region includes a plurality of first conductivity type anode layers exposed to a surface of the semiconductor substrate and separated from each other. The IGBT region includes a plurality of first conductivity type body contact layers that are exposed to the surface of the semiconductor substrate and separated from each other. The anode layer includes at least one or more of the first anode layers. The first anode layer is formed in a position in the proximity of at least IGBT region, and an area of a plane direction of the semiconductor substrate in each of the first anode layers is larger than the area of a plane direction of the semiconductor substrate in the body contact layer in the closest proximity of the diode region.

First claim

The invention claimed is:

1. A semiconductor device, comprising:
a diode region that includes:
a plurality of first conductivity type anode layers having a surface that is exposed to a surface of a semiconductor substrate and separated from each other;
a first conductivity type diode body layer that is formed on a back side of the plurality of anode layers and has lower first conductivity type impurity concentration than the plurality of anode layers;
a second conductivity type diode drift layer that is formed on the back side of the diode body layer; and
a second conductivity type cathode layer that is formed on the back side of the diode drift layer and has higher second conductivity type impurity concentration than the diode drift layer, and
an IGBT region that is formed on a same semiconductor substrate as the diode region,
the IGBT region includes:
a second conductivity type emitter layer that is exposed to the surface of the semiconductor substrate;
a plurality of first conductivity type body contact layers that are exposed to the surface of the semiconductor substrate and separated from each other;
a first conductivity type IGBT body layer that is formed on back sides of the emitter layer and the plurality of body contact layers and has lower first conductivity type impurity concentration than the plurality of body contact layers;
a second conductivity type IGBT drift layer that is formed on the back side of the IGBT body layer;
a first conductivity type collector layer that is formed on the back side of the IGBT drift layer; and
an IGBT gate electrode that faces the IGBT body layer within a range separating the emitter layer from the IGBT drift layer with an insulation film therebetween, wherein the plurality of anode layers includes a plurality of first anode layers,
the plurality of first anode layers are formed in a position in the proximity of at least the IGBT region,
an area of a plane direction of the semiconductor substrate in each of the first anode layers is larger than the area of a plane direction of the semiconductor substrate in the plurality of body contact layers in the closest proximity of the diode region,
the plurality of anode layers further includes a plurality of second anode layers that are formed in a position farther from the IGBT region than the plurality of first anode layers, and
the area of a plane direction of the semiconductor substrate in each of the second anode layers is smaller than the area of the plane direction of the semiconductor substrate in each of the first anode layers,
the semiconductor device, further comprising:
an area that comes into contact with a surface electrode of a plane direction of the semiconductor substrate in each of the first anode layers is larger than the area that comes into contact with the surface electrode of a plane direction of the semiconductor substrate in the body contact layer in the closest proximity of the diode region, the surface electrode comes into contact with the surface of the semiconductor substrate,
wherein the area that comes into contact with the surface electrode of a plane direction of the semiconductor substrate in each of the second anode layers is smaller than the area that comes into contact with the surface electrode of the plane direction of the semiconductor substrate in each of the first anode layers,
wherein all surfaces of the plurality of anode layers, except a surface of the plurality of anode layers that is exposed to the surface of the semiconductor substrate, are in contact with the diode body layer.

Assignees

• Soeno Akitaka
• Toyota Motor Co Ltd

Inventors

• Soeno Akitaka

Classifications

• H10D62/127

  of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs · CPC title

• H10D62/126

  Top-view geometrical layouts of the regions or the junctions · CPC title

• H10D64/117 Primary

  Recessed field plates, e.g. trench field plates or buried field plates · CPC title

• H10D62/142

  Anode regions of thyristors or collector regions of gated bipolar-mode devices · CPC title

• H10D12/481

  having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs · CPC title