Drive device and display device

Patent metadata

Field	Value
Publication number	US-9378697-B2
Application number	US-201314375837-A
Country	US
Kind code	B2
Filing date	Feb 13, 2013
Priority date	Feb 20, 2012
Publication date	Jun 28, 2016
Grant date	Jun 28, 2016

Abstract

Included are: refresh a rate changing section ( 15 ) for changing a refresh rate of a display panel ( 2 ) by configuring settings for scan periods during each of which a plurality of gate signal lines (G) of the display panel ( 2 ) are sequentially scanned and for pause periods during each of which sequential scanning of the plurality of gate signal lines (G) is suspended; and a drive amount control section ( 20 ) for controlling, in accordance with a ratio of the scan periods to the pause periods, drive time during which each of the gate signal lines is driven in each of the scan periods.

First claim

The invention claimed is:

1. A drive device for driving a display panel having a plurality of pixels, comprising:
a timing controller that:
changes a refresh rate of the display panel by configuring settings for scan periods during each of which a plurality of gate signal lines of the display panel are sequentially scanned and for pause periods during each of which sequential scanning of the plurality of gate signal lines is suspended; and
controls, in accordance with a ratio of the scan periods to the pause periods, drive time during which each of the gate signal lines is driven in each of the scan periods such that a ratio of the drive time of each of the gate signal lines to non-drive time other than the drive time of the respective gate signal line is kept constant both prior to and subsequent to a change of the refresh rate.

2. The drive device as set forth in claim 1 , wherein for each of the plurality of gate signal lines, the timing controller controls a pulse width of a drive pulse on the gate signal line and thereby controls drive time of the gate signal line.

3. The drive device as set forth in claim 1 , wherein for each of the plurality of gate signal lines, the timing controller controls a pulse number of drive pulses on the gate signal line and thereby controls drive time of the gate signal line.

4. A display device comprising:
a display panel having a plurality of pixels; and
a drive device as set forth in claim 1 .

5. The display device as set forth in claim 4 , wherein each of the plurality of pixels has a switching element whose semiconductor layer is made of an oxide semiconductor.

6. The display device as set forth in claim 5 , wherein the oxide semiconductor is an oxide composed of indium (In), gallium (Ga), and zinc (Zn).

Assignees

• Sharp Kk

Inventors

• Fujioka Akizumi
• Yanagi Toshihiro
• Ihida Satoshi
• Takahashi Kazuki
• Nakano Taketoshi

Classifications

• G09G2340/0435

  Change or adaptation of the frame rate of the video stream · CPC title

• G09G2310/062

  Waveforms for resetting a plurality of scan lines at a time · CPC title

• G09G2320/043

  Preventing or counteracting the effects of ageing · CPC title

• G09G3/3648 Primary

  using an active matrix (G09G3/367 - G09G3/3696 take precedence) · CPC title

• G09G2330/021

  Power management, e.g. power saving · CPC title