CPU/GPU DCVS co-optimization for reducing power consumption in graphics frame processing

Patent metadata

Field	Value
Publication number	US-9378536-B2
Application number	US-201414266685-A
Country	US
Kind code	B2
Filing date	Apr 30, 2014
Priority date	Apr 30, 2014
Publication date	Jun 28, 2016
Grant date	Jun 28, 2016

Abstract

Systems, methods, and computer programs are disclosed for minimizing power consumption in graphics frame processing. One such method comprises: initiating graphics frame processing to be cooperatively performed by a central processing unit (CPU) and a graphics processing unit (GPU); receiving CPU activity data and GPU activity data; determining a set of available dynamic clock and voltage/frequency scaling (DCVS) levels for the GPU and the CPU; and selecting from the set of available DCVS levels an optimal combination of a GPU DCVS level and a CPU DCVS level, based on the CPU and GPU activity data, which minimizes a combined power consumption of the CPU and the GPU during the graphics frame processing.

First claim

What is claimed is:

1. A method for minimizing power consumption in graphics frame processing, the method comprising:
initiating graphics frame processing to be performed by a central processing unit (CPU) and a graphics processing unit (GPU), wherein the frame processing comprises a CPU/GPU serialized workload;
receiving CPU activity data and GPU activity data;
determining a set of available dynamic clock and voltage/frequency scaling (DCVS) levels for the GPU and the CPU; and
selecting from the set of available DCVS levels a combination of a GPU DCVS level and a CPU DCVS level, based on the CPU and GPU activity data, which reduces a combined power consumption of the CPU and the GPU during the graphics frame processing, wherein the combination of the GPU DCVS level and the CPU DCVS level comprises an operating point in a CPU/GPU frequency space that reduces the combined power consumption of the CPU and the GPU during the CPU/GPU serialized workload.

2. The method of claim 1 , wherein the CPU activity data and the GPU activity data are received from a respective activity profiler associated with the CPU and the GPU.

3. The method of claim 1 , wherein the CPU and GPU activity data comprise data specifying one or more of a processor workload, an active time, an idle time, and a waiting time.

4. The method of claim 1 , further comprising:
receiving temperature data from one or more of at least one CPU temperature sensor and at least one GPU temperature sensor; and
receiving quiescent state supply current leakage (IDDQ) data associated with one or more of the GPU and the CPU;
wherein the combination of the GPU and CPU DCVS levels are selected based on the CPU and GPU activity data and one or more of the temperature data and the IDDQ data.

5. A system for minimizing power consumption in graphics frame processing, the system comprising:
means for initiating graphics frame processing to be performed by a central processing unit (CPU) and a graphics processing unit (GPU), wherein the frame processing comprises a CPU/GPU serialized workload;
means for receiving CPU activity data and GPU activity data;
means for determining a set of available dynamic clock and voltage/frequency scaling (DCVS) levels for the GPU and the CPU; and
means for selecting from the set of available DCVS levels a combination of a GPU DCVS level and a CPU DCVS level, based on the CPU and GPU activity data, which reduces a combined power consumption of the CPU and the GPU during the graphics frame processing, wherein the combination of the GPU DCVS level and the CPU DCVS level comprises an operating point in a CPU/GPU frequency space that reduces the combined power consumption of the CPU and the GPU during the CPU/GPU serialized workload.

6. The system of claim 5 , wherein the CPU activity data and the GPU activity data are received from a respective activity profiler associated with the CPU and the GPU.

7. The system of claim 5 , wherein the CPU and GPU activity data comprise data specifying one or more of a processor workload, an active time, an idle time, and a waiting time.

8. The system of claim 5 , further comprising:
means for receiving temperature data from one or more of at least one CPU temperature sensor and at least one GPU temperature sensor; and
means for receiving quiescent state supply current leakage (IDDQ) data associated with one or more of the GPU and the CPU;
wherein the combination of the GPU and CPU DCVS levels are selected based on the CPU and GPU activity data and one or more of the temperature data and the IDDQ data.

9. A non-transitory computer-readable medium storing a computer program that is executed by a processor for minimizing power consumption in graphics frame processing, the computer program comprising logic configured to:
initiate graphics frame processing to be performed by a central processing unit (CPU) and a graphics processing unit (GPU), wherein the frame processing comprises a CPU/GPU serialized workload;
receive CPU activity data and GPU activity data;
determine a set of available dynamic clock and voltage/frequency scaling (DCVS) levels for the GPU and the CPU; and
select from the set of available DCVS levels a combination of a GPU DCVS level and a CPU DCVS level, based on the CPU and GPU activity data, which reduces a combined power consumption of the CPU and the GPU during the graphics frame processing, wherein the combination of the GPU DCVS level and the CPU DCVS level comprises an operating point in a CPU/GPU frequency space that reduces the combined power consumption of the CPU and the GPU during the CPU/GPU serialized workload.

10. The non-transitory computer-readable medium of claim 9 , wherein the CPU activity data and the GPU activity data are received from a respective activity profiler associated with the CPU and the GPU.

11. The non-transitory computer-readable medium of claim 9 , wherein the CPU and GPU activity data comprise data specifying one or more of a processor workload, an active time, an idle time, and a waiting time.

12. The non-transitory computer-readable medium of claim 9 , further comprising logic configured to:
receive temperature data from one or more of at least one CPU temperature sensor and at least one GPU temperature sensor; and
receive quiescent state supply current leakage (IDDQ) data associated with one or more of the GPU and the CPU;
wherein the combination of the GPU and CPU DCVS levels are selected based on the CPU and GPU activity data and one or more of the temperature data and the IDDQ data.

13. A system for minimizing power consumption in graphics frame processing, the system comprising:
a system on chip (SoC) comprising a central processing unit (CPU), a graphics processing unit (GPU), and a dynamic clock and voltage/frequency scaling (DCVS) controller in communication with the GPU and the CPU; and
a CPU/GPU DCVS co-optimization module configured to determine a combination of a GPU DCVS level and a CPU DCVS level for the DCVS controller, based on CPU and GPU activity data, which reduces a combined power consumption of the CPU and the GPU during graphics frame processing, wherein the graphics frame processing comprises a CPU/GPU serialized workload and the optimal combination of the GPU DCVS level and the CPU DCVS level comprises an operating point in a CPU/GPU frequency space that reduces the combined power consumption of the CPU and the GPU during the CPU/GPU serialized workload.

14. The system of claim 13 , wherein the CPU/GPU DCVS co-optimization module comprises logic configured to:
determine a set of available dynamic clock and voltage/frequency scaling (DCVS) levels for the GPU and the CPU; and
determine the combination of the GPU DCVS level and the CPU DCVS level from the set of available DCVS levels.

15. The system of claim 13 , wherein the CPU and GPU activity data comprise data specifying one or more of a processor workload, an active time, an idle time, and a waiting time.

16. The system of claim 13 , wherein the CPU/GPU DCVS co-optimization module comprises logic configured to:
receive temperature data from one or more of at least one CPU temperature sensor and at least one GPU temperature sensor; and
receive quiescent state supply current leakage (IDDQ) data associated with one or more of the GPU and the CPU;
wherein the combination of the GPU and CPU DCVS levels are selected based on the CPU and GPU activity data and one or more of the temperature data and the IDDQ data.

Assignees

• Qualcomm Inc

Inventors

• Park Hee Jun
• Kang Young Hoon
• Mondal Mriganka

Classifications

• G06F1/3296

  by lowering the supply or operating voltage · CPC title

• G06F1/324

  by lowering clock frequency · CPC title

• Y02B60/1285

  Cross-Sectional Technologies · mapped topic

• Y02B60/1217

  Cross-Sectional Technologies · mapped topic

• G09G2330/021

  Power management, e.g. power saving · CPC title