Low power LO distribution using a frequency-multiplying subharmonically injection-locked oscillator

US9374100B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9374100-B2
Application numberUS-49642209-A
CountryUS
Kind codeB2
Filing dateJul 1, 2009
Priority dateJul 1, 2009
Publication dateJun 21, 2016
Grant dateJun 21, 2016

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  1. Title

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A local oscillator communicates a signal of relatively low frequency across an integrated circuit to the location of a mixer. Near the mixer, a frequency-multiplying SubHarmonically Injection-Locked Oscillator (SHILO) receives the signal and generates therefrom a higher frequency signal. If the SHILO outputs I and Q quadrature signals, then the I and Q signals drive the mixer. If the SHILO does not generate quadrature signals, then a quadrature generating circuit receives the SHILO output signal and generates therefrom I and Q signals that drive the mixer. In one advantageous aspect, the frequency of the signal communicated over distance from the local oscillator to the SHILO is lower than the frequency of the I and Q signals that drive the mixer locally. Reducing the frequency of the signal communicated over distance can reduce power consumption of the LO signal distribution system by more than fifty percent as compared to conventional systems.

First claim

Opening claim text (preview).

What is claimed is: 1. An integrated circuit comprising: a local oscillator including a phase-locked loop configured to output a first signal having a first frequency, the local oscillator configured to output a single-ended signal having a second frequency that is lower than the first frequency; a SubHarmonically Injection-Locked Oscillator (SHILO) configured to: receive the single-ended signal having the second frequency at an input terminal of the SHILO from an output terminal of the local oscillator; and generate a second signal based on the single-ended signal, wherein the second signal has a third frequency that is greater than the second frequency, and wherein the third frequency is less than or equal to the first frequency; and a quadrature signal generator configured to: receive the second signal having the third frequency at a set of input terminals of the quadrature signal generator from a set of output terminals of the SHILO; and generate, based on the second signal, a quadrature signal including an in-phase (I) signal having a fourth frequency and a quadrature-phase (Q) signal having the fourth frequency. 2. The integrated circuit of claim 1 , wherein the single-ended signal is communicated a distance of at least one millimeter from the local oscillator to the SHILO. 3. The integrated circuit of claim 1 , wherein the local oscillator is disposed more than one millimeter away from the SHILO, and wherein the fourth frequency is greater than the second frequency. 4. The integrated circuit of claim 1 , further comprising: a mixer configured to receive the I signal and the Q signal. 5. The integrated circuit of claim 1 , wherein the fourth frequency is half the third frequency. 6. The integrated circuit of claim 1 , wherein the single-ended signal is a first periodic signal and the second frequency is a fundamental frequency of the first periodic signal, wherein the second signal is a second periodic signal and the third frequency is a fundamental frequency of the second periodic signal, and wherein the I signal and the Q signal are third periodic signals and the fourth frequency is a fundamental frequency of the third periodic signals. 7. The integrated circuit of claim 1 , wherein the SHILO comprises: a pulse generator configured to: receive the single-ended signal at an input terminal of the pulse generator, wherein the input terminal of the pulse generator corresponds to the input terminal of the SHILO; and generate a pulse signal based on the single-ended signal; and an oscillator having a frequency lock range that includes the third frequency but does not include the second frequency, wherein the oscillator is configured to: receive the pulse signal at an input terminal of the oscillator from an output terminal of the pulse generator; and generate the second signal from the pulse signal. 8. The integrated circuit of claim 1 , wherein the SHILO includes an oscillator, wherein the oscillator includes an LC tank circuit, and wherein the LC tank circuit includes an inductor and a capacitor. 9. The integrated circuit of claim 1 , wherein the SHILO includes a ring oscillator or an injection-locked quadrature voltage controlled oscillator (QVCO). 10. The integrated circuit of claim 7 , wherein the pulse signal includes a plurality of substantially identical pulses, wherein each pulse of the plurality of substantially identical pulses has a pulse width, and wherein the pulse width is related to a propagation delay of a circuit element in the pulse generator. 11. A method comprising: receiving a single-ended signal having a second frequency at an input terminal of a SubHarmonically Injection-Locked Oscillator (SHILO) from an output terminal of a local oscillator configured to output the single-ended signal based on a first signal having a first frequency that is less than the second frequency, wherein the single-ended signal is a periodic signal; generating, at the SHILO, a second signal based on the single-ended signal, wherein the second signal has a third frequency that is greater than the second frequency, and wherein the third frequency is less than or equal to the first frequency; and providing the second signal from a set of output terminals of the SHILO to a set of input terminals of a quadrature signal generator circuit, wherein the quadrature signal generator circuit is configured to generate an in-phase (I) signal having a fourth frequency and a quadrature-phase (Q) signal having the fourth frequency. 12. The method of claim 11 , wherein generating the second signal comprises: generating a pulse signal based on the single-ended signal; and supplying the pulse signal to an oscillator included in the SHILO, wherein the oscillator is configured to oscillate at the third frequency and to output the second signal. 13. The method of claim 11 , wherein the SHILO includes an oscillator, wherein the oscillator includes an LC tank circuit, and wherein the LC tank circuit includes an inductor and a capacitor. 14. The method of claim 11 , wherein the SHILO includes a ring oscillator. 15. An integrated circuit comprising: a local oscillator including a phase-locked loop and a divider, the phase-locked loop configured to output a first signal having first frequency to the divider, and the local oscillator configured to output a single-ended periodic signal based on an output of the divider, the single-ended periodic signal having a second frequency that is lower than the first frequency; a SubHarmonically Injection-Locked Oscillator (SHILO) that is disposed more than one millimeter away from the local oscillator, wherein the SHILO is configured to: receive the single-ended periodic signal having the second frequency at an input terminal of the SHILO from an output terminal of the local oscillator; and generate, based on the single-ended periodic signal, an in-phase (I) differential signal having a third frequency and a quadrature-phase (Q) differential signal having the third frequency, wherein the third frequency is greater than the second frequency, and wherein the third frequency is less than or equal to the first frequency; and a mixer configured to receive the I differential signal and the Q differential signal at a set of input terminals of the mixer from a set of output terminals of the SHILO. 16. The integrated circuit of claim 15 , wherein the SHILO is disposed less than one millimeter away from the mixer, and wherein the SHILO includes a Quadrature Voltage-Controlled Oscillator (QVCO). 17. A method comprising: receiving a single-ended periodic signal having a second frequency at an input terminal of a SubHarmonically Injection-Locked Oscillator (SHILO) from an output terminal of a local oscillator configured to output the single-ended periodic signal having the second frequency based on a first signal having first frequency that is less than the second frequency, and wherein the SHILO is disposed more than one millimeter away from the local oscillator; at the SHILO, generating, based on the single-ended periodic signal, an in-phase (I) differential signal and a quadrature-phase (Q) differential signal, wherein the I differential signal and the Q differential signal have a third frequency that is greater than the second frequency, and wherein the third frequency is less than or equal to the first frequency; and supplying the I differential signal and the Q differential signal from a set of output terminals of the SHILO to a set of input terminals of a mixer. 18. The method of claim 17 , wherein the SHILO is disp

Assignees

Inventors

Classifications

  • H03B27/00Primary

    Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs · CPC title

  • generating or using signals in quadrature · CPC title

  • Locking of an oscillator by injecting an input signal directly into the oscillator · CPC title

  • Generation of oscillations based on harmonic frequencies, e.g. overtone oscillators · CPC title

  • the amplifier comprising one or more field effect transistors · CPC title

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What does patent US9374100B2 cover?
A local oscillator communicates a signal of relatively low frequency across an integrated circuit to the location of a mixer. Near the mixer, a frequency-multiplying SubHarmonically Injection-Locked Oscillator (SHILO) receives the signal and generates therefrom a higher frequency signal. If the SHILO outputs I and Q quadrature signals, then the I and Q signals drive the mixer. If the SHILO does…
Who is the assignee on this patent?
Park Dongmin, Savoj Jafar, Qualcomm Inc
What technology area does this patent fall under?
Primary CPC classification H03B27/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 21 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).