Signal processing

US9374069B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9374069-B2
Application numberUS-201414341216-A
CountryUS
Kind codeB2
Filing dateJul 25, 2014
Priority dateJul 26, 2013
Publication dateJun 21, 2016
Grant dateJun 21, 2016

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A method of processing an amplitude-modulated analog signal at a carrier frequency F c comprises: digitizing the analog signal to produce an input bit stream that represents the amplitude of the analog signal; generating an in-phase reference bit stream that is synchronous to the carrier frequency F c and represents an in-phase digital reference signal substantially in the form of a sine and/or cosine wave; and multiplying the input bit stream with the in-phase reference bit stream to produce an output bit stream representing the amplitude modulation of the analog signal.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method of processing an amplitude-modulated analog signal at a carrier frequency F c , comprising: digitizing the analog signal at a sampling rate R that is synchronous to the carrier frequency F c to produce an input bit stream that represents the amplitude of the analog signal, wherein R=2*(1*3*5 . . . N)*F c or R=4*(1*3*5 . . . N)*F c , where N>1 is an odd number representing odd harmonics in the analog signal; generating an in-phase reference bit stream that is synchronous to the carrier frequency F c and represents an in-phase digital reference signal substantially in the form of a sine and/or cosine wave; and multiplying the input bit stream with the in-phase reference bit stream to produce an output bit stream representing the amplitude modulation of the analog signal. 2. The method of claim 1 , comprising digitizing the analog signal at a sampling rate R=4*3*F c =12F c or R=4*3*5*F c =60F c . 3. The method of claim 1 , wherein digitizing the analog signal is performed using pulse-density modulation (PDM) or pulse-width modulation (PWM). 4. The method of claim 1 , wherein digitizing the analog signal comprises carrying out delta-sigma modulation to produce a one-bit input bit stream. 5. The method of claim 1 , wherein digitizing the analog signal is performed using pulse-code modulation (PCM). 6. The method of claim 1 , wherein digitizing the analog signal comprises carrying out multi-bit conversion to produce a multi-bit input bit stream. 7. The method of claim 1 , comprising generating a multi-bit in-phase reference bit stream that is synchronous to the carrier frequency F c . 8. The method of claim 1 , further comprising: generating a quadrature reference bit stream that is synchronous to the carrier frequency F c and represents a quadrature digital reference signal substantially in the form of a cosine and/or sine wave; and multiplying the input bit stream with the quadrature reference bit stream to produce an output bit stream representing a quadrature component of the analog signal. 9. The method of claim 8 , comprising generating a pair of synchronous in-phase and quadrature reference bit streams. 10. The method of claim 1 , wherein generating an in-phase reference bit stream that is synchronous to the carrier frequency F c comprises controlling a clock so as to skew the timing to achieve phase accuracy. 11. A pickoff signal processing system for a sensor comprising a movement sensing structure, the system comprising: an analog-to-digital converter (ADC) arranged to digitize an amplitude-modulated analog pickoff signal representing movement of the sensing structure which is at a carrier frequency F c and produce an input bit stream that represents the amplitude of the analog pickoff signal, wherein the ADC is arranged to digitize the analog pickoff signal at a sampling rate R that is synchronous to the carrier frequency F c according to R=2*(1*3*5 . . . N)*F c or R=4*(1*3*5 . . . N)*F c , where N>1 is an odd number representing odd harmonics in the analog signal; a synchronous modulator or look-up table arranged to generate an in-phase reference bit stream that is synchronous to the carrier frequency F c and represents an in-phase digital reference signal substantially in the form of a sine and/or cosine wave; and logic means arranged to multiply the input bit stream with the in-phase reference bit stream and produce an output bit stream representing the amplitude modulation of the analog pickoff signal. 12. The system of claim 11 , wherein the ADC is arranged to digitize the analog pickoff signal at a sampling rate R=4*3*F c =12F c or R=4*3*5*F c =60F c . 13. The system of claim 11 , wherein the ADC is arranged to digitize the analog pickoff signal using pulse-density modulation (PDM), or pulse-width modulation (PWM), or pulse-code modulation (PCM). 14. The system of claim 11 , wherein the ADC is arranged to carry out delta-sigma modulation to produce a one-bit input bit stream. 15. The system of claim 11 , wherein the ADC is arranged to carry out multi-bit conversion to produce a multi-bit input bit stream. 16. The system of claim 11 , wherein: the synchronous modulator or look-up table is arranged to generate a quadrature reference bit stream that is synchronous to the carrier frequency F c and represents a quadrature digital reference signal substantially in the form of a cosine and/or sine wave; and the logic means is arranged to multiply the input bit stream with the quadrature reference bit stream to produce an output bit stream representing a quadrature component of the analog signal. 17. The system of claim 16 , wherein the synchronous modulator or look-up table is arranged to generate a synchronous pair of in-phase and quadrature reference bit streams. 18. The system of claim 11 , wherein the synchronous modulator or look-up table utilizes a clock controlled relative to the ADC so as to skew the timing to achieve phase accuracy.

Assignees

Inventors

Classifications

  • of semiconductor devices · CPC title

  • the devices involving a micromechanical structure · CPC title

  • Analogue/digital converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title

  • Delta-sigma modulation · CPC title

  • Signal processing not specific to any of the devices covered by groups G01C19/5607 - G01C19/5719 · CPC title

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What does patent US9374069B2 cover?
A method of processing an amplitude-modulated analog signal at a carrier frequency F c comprises: digitizing the analog signal to produce an input bit stream that represents the amplitude of the analog signal; generating an in-phase reference bit stream that is synchronous to the carrier frequency F c and represents an in-phase digital reference signal substantially in the form of a sine and/…
Who is the assignee on this patent?
Atlantic Inertial Systems Ltd
What technology area does this patent fall under?
Primary CPC classification G01C19/5684. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 21 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).