Liquid crystal display with one third driving structure of pixel array of display panel

Patent metadata

Field	Value
Publication number	US-9373294-B2
Application number	US-55492109-A
Country	US
Kind code	B2
Filing date	Sep 6, 2009
Priority date	Jul 20, 2009
Publication date	Jun 21, 2016
Grant date	Jun 21, 2016

Abstract

A liquid crystal display (LCD) including a display panel and a source driver is provided. The display panel includes a plurality of pixels arranged in an array. The source driver is coupled to the display panel and includes a plurality of source lines. Each of the source lines of the source driver is responsible for performing the pixel-writing to six corresponding pixel columns in the display panel.

First claim

What is claimed is:

1. A liquid crystal display, comprising:
a display panel having a plurality of pixels arranged in an array;
a source driver coupled to the display panel and having a plurality of source lines, wherein each of the source lines is only responsible for performing pixel-writing to a part of pixels of six corresponding pixel columns; and
a gate driver coupled to the display panel and having a plurality of gate lines, wherein each of the gate lines is only responsible for performing pixel-turning on or off to a corresponding pixel row, and the i th gate line is coupled to all of pixels in the i th pixel row and the (i+1) th gate line is coupled to all of pixels in the (i+1) th pixel row, where i is a positive integer greater than or equal to 0,
wherein the j th source line is only coupled to pixels in (k−1) th pixel row of the (3j+1) th , (3j+3) th and (3j+5) th pixel columns and pixels in k th pixel row of the (3j+2) th , (3j+4) th and (3j+6) th pixel columns, where j is a positive integer greater than or equal to 0, and k is an odd positive integer,
wherein a frame period of the liquid crystal display has a plurality of periods,
wherein, in the (3i+1) th period, the i th , (i+1) th and (i+2) th gate lines output enabled scan signal,
wherein, in the (3i+2) th period, the i th and (i+1) th gate lines output enabled scan signal and the (i+2) th gate line outputs disabled scan signal, and,
wherein, in the (3i+3) th period, the i th gate line outputs enabled scan signal, and the (i+1) th and (i+2) th gate lines output disabled scan signal.

2. The liquid crystal display according to claim 1 , wherein the enabled scan signal output by the (i+1) th gate line would be briefly disabled once during the (3i+1) th through (3i+2) th periods.

3. A liquid crystal display, comprising:
a display panel having a plurality of pixels arranged in an array;
a source driver coupled to the display panel and having a plurality of source lines, wherein each of the source lines is only responsible for performing pixel-writing to a part of pixels of six corresponding pixel columns; and
a gate driver coupled to the display panel and having a plurality of gate lines, wherein each of the gate lines is only responsible for performing pixel-turning on or off to a corresponding pixel row, and the i th gate line is coupled to all of pixels in the i th pixel row, where i is a positive integer greater than or equal to 0,
wherein the j th source line is only coupled to pixels in (k−1) th pixel row of the (3j+1) th , (3j+3) th and (3j+5) th pixel columns and pixels in k th pixel row of the (3j+2) th , (3j+4) th and (3j+6) th pixel columns, where j is a positive integer greater than or equal to 0, and k is an odd positive integer,
wherein a number of times of all of the pixels in the (3j+1) th and (3j+4) th pixel columns being influenced by a feed through effect is the same and equal to a first predetermined value, and all of the pixels in the (3j+1) th and (3j+4) th pixel columns are corresponding to a first color,
wherein a number of times of all of the pixels in the (3j+2) th and (3j+5) th pixel columns being influenced by the feed through effect is the same and equal to a second predetermined value, and all of the pixels in the (3j+2) th and (3j+5) th pixel columns are corresponding to a second color,
wherein a number of times of all of the pixels in the (3j+3) th and (3j+6) th pixel columns being influenced by the feed through effect is the same and equal to a third predetermined value, and all of the pixels in the (3j+3) th and (3j+6) th pixel columns are corresponding to a third color, and,
wherein the first to the third predetermined value are different from each other, and the first to the third colors are different from each other.

Assignees

• Chen Ken-Ming
• Hung Chi-Mao
• Hsieh Yao-Jen
• Lu Chao-Liang
• Kuo Jing-Tin
• Tien Pei-Lin
• Au Optronics Corp

Inventors

• Chen Ken-Ming
• Hung Chi-Mao
• Hsieh Yao-Jen
• Lu Chao-Liang
• Kuo Jing-Tin
• Tien Pei-Lin

Classifications

• G09G2310/06

  Details of flat display driving waveforms · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G2320/0219

  Reducing feedthrough effects in active matrix panels, i.e. voltage changes on the scan electrode influencing the pixel voltage due to capacitive coupling · CPC title

• G09G2310/02

  Addressing, scanning or driving the display screen or processing steps related thereto · CPC title