Packaged device

US9372202B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9372202-B2
Application numberUS-201213618643-A
CountryUS
Kind codeB2
Filing dateSep 14, 2012
Priority dateSep 18, 2008
Publication dateJun 21, 2016
Grant dateJun 21, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A packaged device of one embodiment includes a device layer section, and first and second packaging members. The device layer section is one where a movable microdevice including a movable part and a terminal part is formed. The first packaging member is joined to the device layer section, and includes a wiring region provided at a position corresponding to the terminal part and a conductive plug extending through the wiring region. The second packaging member is joined to a side of the device layer section opposite the first packaging member.

First claim

Opening claim text (preview).

What is claimed is: 1. A packaged device comprising: a device layer section in which a movable microdevice including a movable part and a terminal part is formed; a first packaging member joined to the device layer section, and including a wiring region provided at a position corresponding to the terminal part and a conductive plug extending through the wiring region, the first packaging member including a conductive non-wiring region electrically isolated from the wiring region, the conductive non-wiring region adapted to act as a ground; and a second packaging member joined to a side of the device layer section opposite the first packaging member, and an insulating film provided on a surface of the first packaging member, and including a first opening at a position corresponding to the wiring region; a first electrode pad electrically coupled to the wiring region at the first opening; wherein the insulating film includes a second opening at a position corresponding to the conductive non-wiring region, and wherein a second electrode pad is electrically coupled to the conductive non-wiring region at the second opening. 2. The packaged device according to claim 1 , wherein the second electrode pad is provided in the second opening in an in-plane direction of the first packaging member. 3. The packaged device according to claim 1 , wherein the first packaging member includes a recess facing the movable part of the movable microdevice. 4. The packaged device according to claim 1 , wherein the second packaging member includes a recess facing the movable part of the movable microdevice.

Assignees

Inventors

Classifications

  • G01P15/125Primary

    by capacitive pick-up · CPC title

  • for acceleration measuring devices · CPC title

  • Details · CPC title

  • Assembling formed circuit to base · CPC title

  • Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9372202B2 cover?
A packaged device of one embodiment includes a device layer section, and first and second packaging members. The device layer section is one where a movable microdevice including a movable part and a terminal part is formed. The first packaging member is joined to the device layer section, and includes a wiring region provided at a position corresponding to the terminal part and a conductive pl…
Who is the assignee on this patent?
Inoue Hiroaki, Katsuki Takashi, Nakazawa Fumihiko, and 1 more
What technology area does this patent fall under?
Primary CPC classification G01P15/125. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 21 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).