Differentiator based spread spectrum modulator

Patent metadata

Field	Value
Publication number	US-9369174-B2
Application number	US-201514922016-A
Country	US
Kind code	B2
Filing date	Oct 23, 2015
Priority date	Oct 13, 2011
Publication date	Jun 14, 2016
Grant date	Jun 14, 2016

Abstract

A spread spectrum clock generator which includes a pulse train generator circuit and a modulating circuit configured to produce a modulating signal relating to a time derivative of an output of the pulse train generator circuit. In one embodiment the modulating circuit includes a active differentiator circuit and in another embodiment the modulating circuit includes a passive differentiator circuit. A modulator is included which is configured to produce a spread spectrum clock output which is frequency modulated by the modulating signal.

First claim

The invention claimed is:

1. A spread spectrum clock generator comprising:
a pulse train generator circuit configured to produce a train of pulses;
a modulating circuit configured to produce, for each of the pulse train pulses, a modulating signal relating to a time derivative of the pulse, the modulating circuit including an active differentiator circuit which includes an amplifier, a feedback resistance connected between an output of the amplifier and an inverting input of the amplifier and an input capacitance connected to the inverting input of the amplifier and coupled to receive the pulse train; and
a clock generator configured to produce a spread spectrum clock output which is frequency modulated by the modulating signal.

2. The spread spectrum clock generator of claim 1 wherein the modulating circuit includes a passive differentiator circuit that includes resistor-capacitor differentiation circuitry.

3. The spread spectrum clock generator of claim 2 , wherein the resistor-capacitor differentiation circuitry includes an input capacitor coupled to receive the pulse train and coupled to a resistor voltage divider coupled to a reference voltage, such that an AC response of the passive differentiator is determined substantially by a capacitance of the capacitor, and a DC component is determined by the voltage reference and the voltage divider.

4. The spread spectrum clock generator of claim 1 further including feedback resistance control circuitry configured to control a magnitude of the feedback resistance in response to the pulse train generator circuit.

5. The spread spectrum clock generator of claim 4 wherein the feedback resistance includes at least two resistors and wherein the feedback resistance control circuitry includes a transistor switch connected across one of the at least two resistors, the transistor switch controlled in response to a level of the pulse train pulses.

6. The spread spectrum clock generator of claim 1 wherein the pulse train generator circuit includes pulse shaping circuitry configured to control at least one of the rise and fall time durations and the pulse magnitude level of the pulse train pulses.

7. The spread spectrum clock generator circuit of claim 6 wherein the pulse shaping circuitry includes a capacitor and first and second current sources configured to respectively charge and discharge the capacitor.

8. The spread spectrum clock generator of claim 7 wherein the first current source operates to begin charging the capacitor in response to a rising edge of a pulse train pulse and wherein the second current source operates to begin discharging the capacitor in response to a falling edge of the pulse.

9. The spread spectrum clock generator of claim 8 wherein the pulse shaping circuitry includes delay circuitry for delaying a time at which the first current source operates to begin charging the capacitor and for delaying a time at which the second current source operates to begin discharging the capacitor.

10. A spread spectrum clock generator comprising:
a pulse train generator circuit configured to generate a train of pulses;
a modulating circuit including an active differentiator circuit comprising an amplifier, a feedback resistance connected between an inverting input of the amplifier and the amplifier output and an input capacitance connected to the inverting input of the amplifier and coupled to receive the pulse train;
the active differentiator circuit configured to produce, for each of the pulses of the pulse train, a modulating signal relating to a time derivative of the pulse; and
a voltage controlled oscillator configured to produce a spread spectrum clock output which is frequency modulated by the modulating signal.

11. The spread spectrum clock generator of claim 10 , wherein the pulse train generator circuit includes pulse shaping circuitry configured to control at least one of the rise and fall time durations and the pulse magnitude level of the pulse train pulses.

12. The spread spectrum clock generator of claim 10 wherein the pulse shaping circuitry includes a capacitor and first and second current sources configured to respectively charge and discharge the capacitor with the first current source operable to begin charging the capacitor in response to a rising edge of a pulse train pulse and the second current source operable to begin discharging the capacitor in response to a falling edge of the pulse.

13. The spread spectrum clock generator of claim 10 wherein the active differentiator circuit further includes feedback resistance control circuitry configured to control a magnitude of the feedback resistance, the feedback resistance control circuitry including at least two resistors and a transistor switch connected across one of the at least two resistors and controlled in response to a level of the pulse train pulses.

14. A method of generating a spread spectrum clock comprising:
generating a train of pulses;
producing, for each of the pulse train pulses, a modulating signal relating to a time derivative of the pulse train pulses using an active differentiator circuit which includes an amplifier, a feedback resistance and-an input capacitance; and
modulating a clock signal with the modulating signal to produce the spread spectrum clock.

15. The method of claim 14 wherein the active differentiator circuit further includes feedback resistance control circuitry configured to control a magnitude of the feedback resistance in response to a level of the pulse train pulses.

16. The method of claim 14 further comprising pulse shaping the pulse train pulses by controlling at least one of the rise and fall time durations and the pulse magnitude level of the pulse train pulses.

17. The method of claim 14 wherein producing the modulating signal is accomplished using a passive differentiator circuit that includes resistor-capacitor differentiation circuitry.

18. The method of claim 17 wherein the resistor-capacitor differentiation circuitry includes an input capacitor coupled to receive the pulse train and coupled to a resistor voltage divider coupled to a reference voltage, such that an AC response of the passive differentiator is determined substantially by a capacitance of the capacitor, and a DC component is determined by the voltage reference and the voltage divider.

Assignees

• Texas Instruments Inc

Inventors

• Wong Kern Wai

Classifications

• H04B1/7087 Primary

  Carrier synchronisation aspects · CPC title

• H04B1/7156

  Arrangements for sequence synchronisation · CPC title

• H03L7/0995 Primary

  the oscillator comprising a ring oscillator · CPC title

• H04B15/04

  the interference being caused by substantially sinusoidal oscillations, e.g. in a receiver or in a tape-recorder · CPC title

• H03L7/235

  Nested phase locked loops · CPC title