Solid-state imaging device and camera system
US-9204075-B2 · Dec 1, 2015 · US
US9369147B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9369147-B2 |
| Application number | US-201414491633-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 19, 2014 |
| Priority date | Jul 3, 2014 |
| Publication date | Jun 14, 2016 |
| Grant date | Jun 14, 2016 |
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An analog to digital converter (ADC) core; a reference voltage generator coupled to an input of the ADC core; a bandgap reference coupled to the reference voltage generator; and a window comparator configured to control a selected reference voltage range generated by the reference voltage generator and received by the ADC core.
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What is claimed is: 1. An apparatus, comprising: an analog to digital converter (ADC) core; a reference voltage generator coupled to an input of the ADC core; a bandgap reference coupled to the reference voltage generator; and a window comparator configured to control a selected reference voltage range generated by the reference voltage generator and received by the ADC core. 2. The apparatus of claim 1 , wherein a resolution of the ADC core is mapped to an effective number of bits of a targeted signal input range. 3. The apparatus of claim 1 , wherein the ADC core is a ten bit ADC core. 4. The apparatus of claim 1 , wherein the reference voltage generator comprises a voltage reference multiplexer. 5. The apparatus of claim 4 , wherein the voltage reference multiplexer comprises a resistive ladder. 6. An apparatus, comprising: means for performing an analog to digital conversion; a reference voltage generator coupled to an input of the means for performing the analog to digital conversion; a bandgap reference coupled to the reference voltage generator; and a window comparator configured to control a selected reference voltage range generated by the reference voltage generator and received by the means for performing the analog to digital conversion. 7. The apparatus of claim 6 , wherein a resolution of the means for performing the analog to digital conversion is mapped to an effective number of bits of a targeted signal input range. 8. The apparatus of claim 6 , wherein the means for performing the analog to digital conversion is a ten bit ADC core. 9. The apparatus of claim 6 , wherein the reference voltage generator comprises a voltage reference multiplexer. 10. The apparatus of claim 6 , wherein the voltage reference multiplexer comprises a resistive ladder.
Analogue/digital conversion; Digital/analogue conversion (conversion of analogue values to or from differential modulation H03M3/00) · CPC title
Analogue/digital converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title
Analogue value compared with reference values (H03M1/48 takes precedence) · CPC title
the feedback signal controlling the reference levels of the analogue/digital converter · CPC title
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