Accumulation-mode field effect transistor with improved current capability

Patent metadata

Field	Value
Publication number	US-9368587-B2
Application number	US-201414292894-A
Country	US
Kind code	B2
Filing date	May 31, 2014
Priority date	Jan 30, 2001
Publication date	Jun 14, 2016
Grant date	Jun 14, 2016

Abstract

An accumulation-mode field effect transistor including a plurality of gates. The accumulation-mode field effect transistor including a semiconductor region including a channel region adjacent to but insulated from each of the plurality of gates.

First claim

What is claimed is:

1. An accumulation-mode field effect transistor, comprising:
a plurality of gates;
a semiconductor region including a plurality of channel regions adjacent to but insulated from each of the plurality of gates, and a drift region,
the plurality of channel regions and the drift region being of a first conductivity type;
a drain terminal and a source terminal configured so that when the accumulation-mode field effect transistor is in the on state a current flows from the drain terminal to the source terminal through the drift region and the channel regions; and
a plurality of insulation-filled trenches extending into the semiconductor region adjacent to the drift region, at least one sidewall of each insulation-filled trench being lined with silicon material of a second conductivity type opposite the first conductivity type.

2. The accumulation-mode field effect transistor of claim 1 , wherein the sidewalls and bottom of each insulation-filled trench is lined with silicon material of the second conductivity type.

3. The accumulation-mode field effect transistor of claim 1 , wherein opposite sidewalls of each insulation-filled trench are lined with opposite conductivity type silicon material.

4. The accumulation-mode field effect transistor of claim 1 , further comprising:
a plurality of gate trenches extending in the semiconductor region, each of the plurality of gate trenches having one of the plurality of gates disposed therein, the plurality of gate trenches and insulation-filled trenches being alternately arranged so that each of the plurality of channel region separates one insulation-filled trench from an adjacent gate trench, the plurality of insulation-filled trenches extending deeper in the semiconductor region than the plurality of gate trenches.

5. The accumulation-mode field effect transistor of claim 4 , wherein each of the plurality of channel regions includes a plurality of regions of the second conductivity type, each of the plurality of regions of the second conductivity type laterally extending to abut the insulation-filled trench and the gate trench between which each of the plurality of regions of the second conductivity type are located.

6. The accumulation-mode field effect transistor of claim 4 , wherein each of the plurality of channel regions includes a region of the first conductivity type, each of the regions laterally extending to abut at least one of the insulation-filled trench and at least one of the gate trenches, each of the regions having a doping concentration higher than that of the plurality of channel regions.

7. The accumulation-mode field effect transistor of claim 4 , wherein each of the plurality of channel regions includes a first region of the first conductivity type and a second region of the first conductivity type, the first regions and the second regions each having a doping concentration higher than that of the plurality of channel regions.

8. An accumulation-mode field effect transistor, comprising:
a gate;
a semiconductor region including:
a channel region adjacent to but insulated from the gate, and
a drift region, the channel region and the drift region having of a first conductivity type;

a drain terminal and a source terminal configured so that when the accumulation-mode field effect transistor is in the on state a current flows from the drain terminal to the source terminal through the drift region and the channel region; and
a trench extending into the semiconductor region adjacent to the drift region, a sidewall of the trench being lined with a silicon material of a second conductivity type opposite the first conductivity type.

9. The accumulation-mode field effect transistor of claim 8 , wherein a bottom of the trench is lined with the silicon material of the second conductivity type.

10. The accumulation-mode field effect transistor of claim 8 , wherein the trench is an insulation-filled trench.

11. The accumulation-mode field effect transistor of claim 8 , wherein the sidewall is a first sidewall of trench,
the accumulation-mode field effect transistor further comprising:
a second sidewall of the trench lined with a silicon material of a the first conductivity type.

12. The accumulation-mode field effect transistor of claim 8 , further comprising:
a gate trench extending in the semiconductor region, the gate trench having the gate disposed therein, the trench being an insulation-filled trench adjacent to the gate trench, the insulation-filled trench extending deeper in the semiconductor region than the gate trench.

13. The accumulation-mode field effect transistor of claim 12 , wherein the channel region includes a region of the second conductivity type, the region of the second conductivity type laterally extending to and abutting the insulation-filled trench and the gate trench.

14. An accumulation-mode field effect transistor, comprising:
a gate trench including a gate disposed therein;
a semiconductor region including:
a channel region adjacent to but insulated from the gate, and
a drift region, the channel region and the drift region of a first conductivity type;

a drain terminal and a source terminal configured so that when the accumulation-mode field effect transistor is in the on state a current flows from the drain terminal to the source terminal through the drift region and the channel region; and
a trench extending into the semiconductor region adjacent to the drift region, the trench having a depth within the semiconductor region greater than a depth of the gate trench, the trench having a sidewall lined with a dielectric.

15. The accumulation-mode field effect transistor of claim 14 , wherein the trench includes at least one diode.

16. The accumulation-mode field effect transistor of claim 14 , wherein a dielectric layer is not disposed along a bottom of the trench such that a bottom region of the trench is in electric contact with the drift region.

Assignees

• Fairchild Semiconductor

Inventors

• Kocon Christopher Boguslaw
• Shenoy Praveen Muraleedharan

Classifications

• H10P72/7432

  used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate · CPC title

• H10P72/7422

  used to protect an active side of a device or wafer · CPC title

• H10P30/222

  characterised by the angle between the ion beam and the crystal planes or the main crystal surface (characterised by the angle between the ion beam and the mask H10P30/221) · CPC title

• H10P72/74

  using temporarily an auxiliary support · CPC title

• H10P50/283

  by chemical means · CPC title