Anti-diffusion layer, preparation method thereof, thin-film transistor (TFT), array substrate, display device

US9368360B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9368360-B2
Application numberUS-201314345607-A
CountryUS
Kind codeB2
Filing dateMay 31, 2013
Priority dateApr 28, 2013
Publication dateJun 14, 2016
Grant dateJun 14, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An anti-diffusion layer, a preparation method thereof, a thin-film transistor (TFT), an array substrate and a display device are provided, involve the display device manufacturing field and can resolve problem that a high atmosphere temperature is need in process of preparing a tantalum dioxide anti-diffusion layer by PVD or CVD, which causes the gate electrode to volatilize and affect the performance of a display device. The method for preparing the anti-diffusion layer comprises: placing a conductive base ( 1 ) and a cathode ( 4 ) in a electrolytic solution ( 3 ), taking the conductive base ( 1 ) as an anode, and forming a tantalum dioxide anti-diffusion layer on the conductive base ( 1 ) after energizing.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for preparing an anti-diffusion layer, comprising: placing a conductive base and a cathode in an electrolytic solution, taking the conductive base as an anode, and forming a tantalum dioxide anti-diffusion layer on the conductive base after energizing, wherein the electrolytic solution is a tantalum sulfate solution; a mass concentration of the tantalum sulfate solution is ranged from 6 to 9 percent; and the pH value is between 8 and 10, wherein the electrolytic solution also includes a catalyst; the catalyst is methanol; and the mass concentration of methanol is ranged from 10 to 15 percent. 2. The method for preparing the anti-diffusion layer according to claim 1 , wherein the conductive base is made of copper or aluminum. 3. The method for preparing the anti-diffusion layer according to claim 1 , wherein the conductive base is a gate electrode of a thin-film transistor (TFT). 4. The method for preparing the anti-diffusion layer according to claim 3 , wherein the energizing voltage is ranged from 10 to 30 V; the energizing current is ranged from 30 to 100 mA; and the energizing time is 8 to 12 s. 5. The method for preparing the anti-diffusion layer according to claim 2 , wherein the conductive base is a gate electrode of a thin-film transistor (TFT). 6. The method for preparing the anti-diffusion layer according to claim 5 , wherein the energizing voltage is ranged from 10 to 30 V; the energizing current is ranged from 30 to 100 mA; and the energizing time is 8 to 12 s.

Assignees

Inventors

Classifications

  • the material containing tantalum, e.g. Ta2O5 · CPC title

  • Formation by anodic treatments, e.g. anodic oxidation · CPC title

  • H10P14/47Primary

    Electrolytic deposition, i.e. electroplating; Electroless plating · CPC title

  • having different compositions, shapes, layouts or thicknesses of gate insulators in different TFTs · CPC title

  • using liquid deposition, e.g. printing · CPC title

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What does patent US9368360B2 cover?
An anti-diffusion layer, a preparation method thereof, a thin-film transistor (TFT), an array substrate and a display device are provided, involve the display device manufacturing field and can resolve problem that a high atmosphere temperature is need in process of preparing a tantalum dioxide anti-diffusion layer by PVD or CVD, which causes the gate electrode to volatilize and affect the perf…
Who is the assignee on this patent?
Boe Technology Group Co Ltd, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10P14/47. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 14 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).