Memory system and host device
US-2024394189-A1 · Nov 28, 2024 · US
US9367465B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9367465-B2 |
| Application number | US-10179208-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 11, 2008 |
| Priority date | Apr 12, 2007 |
| Publication date | Jun 14, 2016 |
| Grant date | Jun 14, 2016 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
The present invention relates to a computing system which includes a processor and a memory. It also includes a memory access optimizer which is arranged to affect memory access of a program during runtime execution of the software. The program includes a plurality of application elements, each comprising a text field containing a text section, and a memory access field. The memory access optimizer is arranged to implement memory access data in the memory access field in order to affect memory access of the application element. The text section is unchanged by the memory access data implementation.
Opening claim text (preview).
What is claimed is: 1. A computing system comprising: a processor; a memory; a memory access optimizer configured to affect memory access of a program during runtime execution of the program; the program including a plurality of application elements comprising a text field containing a text section, and a memory access field, the memory access optimizer configured to implement memory access data in the memory access field in order to affect memory access of the application element, whereby the memory access optimizer is configured to prevent change to the text section by the memory access data implementation. 2. A computing system in accordance with claim 1 , wherein, the memory access data is arranged to control a prefetch instruction for affecting a prefetch of data from memory. 3. A computing system in accordance with claim 1 , wherein the memory access data is arranged to control selection of a program routine for execution. 4. A computing system in accordance with claim 1 , further comprising: a compiler arranged to implement memory access options within a program including a plurality of application elements, the memory access options being arranged to affect memory access patterns of the program during runtime, and the compiler being arranged to provide a memory access field in the application elements, wherein the value of a datum in the memory access field is arranged to implement the memory access options. 5. A computing system in accordance with claim 4 , wherein the memory access options include an instruction for causing prefetch of data from memory. 6. A computing system in accordance with claim 4 , wherein the memory access options include an instruction for selection of a program routine. 7. A method of compiling a computer program, wherein a computer has instructions stored in non-transitory memory executable by a processor and the computer program includes a plurality of application elements comprising a text field containing a text section, the method comprising: writing memory access options into the application elements for affecting memory access patterns of the computer program during runtime providing a memory access field for the application element(s), wherein the value of a datum in the memory access field is arranged to implement memory access options; and implementing memory access in the memory access field in order to affect memory access of the application elements, wherein implementing the memory access in the memory access field is performed in a manner to prevent change to the text section while implementing memory access in the memory access field. 8. A method in accordance with claim 7 , wherein the memory access options include instructions for causing a prefetch of data from memory. 9. A method in accordance with claim 7 , wherein the memory access options include an instruction for selection of a program routine. 10. A computing device, including instruction stored in non-transitory memory and executed by a processor to control compiling of a program the program having a plurality of application elements including a text field and a text section, where the instructions are executed to: write memory access options into the application elements for affecting memory access patterns of the computer program during runtime; provide a memory access field for the application element(s), wherein a value of a datum in the memory access field is configured to implement memory access options; and implement memory access in the memory access field in order to affect memory access of the application elements, wherein implementing the memory access in the memory access field is performed in a manner to prevent change to the text section while implementing memory access in the memory access field.
Prefetching based on hints or prefetch instructions · CPC title
Optimisation · CPC title
with prefetch · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.