Imaging systems and methods for image signal gain adjustment

US9363450B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9363450-B2
Application numberUS-201414468242-A
CountryUS
Kind codeB2
Filing dateAug 25, 2014
Priority dateAug 27, 2013
Publication dateJun 7, 2016
Grant dateJun 7, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

An imaging system may include image processing circuitry and an image sensor having a pixel, readout circuitry, and control circuitry. The pixel may have a dual conversion gain gate for switching between a high conversion gain mode and a low conversion gain mode. The pixel may capture a first image signal while the dual conversion gain gate is turned of and a second image signal subsequent to capturing the first image signal while the dual conversion gain gate is turned on. The readout circuitry may identify a selected one of the first and second image signals to output to the image processing circuitry based on the first image signal. In this way, the readout circuitry may output a low conversion gain signal when saturating charge is stored on the charge storage region and may output a high conversion gain signal when insufficient charge is stored on the charge storage region.

First claim

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What is claimed is: 1. A method of operating an image sensor coupled to image processing circuitry, wherein the image sensor comprises an array of image sensor pixels and readout circuitry, the method comprising: with an image sensor pixel in the array, capturing a first image signal while a dual conversion gain gate in the image sensor pixel is turned off; with the image sensor pixel, capturing a second image signal subsequent to capturing the first image signal while the dual conversion gain gate is turned on; with a memory circuit in the readout circuitry, storing the first image signal; with the readout circuitry, identifying a selected one of the first and second image signals to output to the image processing circuitry based on the captured first image signal, wherein identifying the selected one of the first and second image signals to output to the image processing circuitry comprises: determining whether the first image signal exceeds a predetermined threshold; and in response to determining that the first image signal does not exceed the predetermined threshold, labeling the first image signal with an indication bit that instructs the readout circuitry not to overwrite the first image signal on the memory circuit; and with the readout circuitry, outputting the identified image signal to the image processing circuitry. 2. The method defined in claim 1 , wherein the image sensor further comprises control circuitry, the method further comprising: with the control circuitry, asserting a dual conversion gain control signal provided to the dual conversion gain gate to turn on the dual conversion gain gate after the image sensor pixel has captured the first image signal. 3. The method defined in claim 1 , wherein identifying the selected one of the first and second image signals to output to the image processing circuitry further comprises: in response to determining that the first image signal does not exceed the predetermined threshold, outputting the first image signal to the image processing circuitry. 4. The method defined in claim 1 , wherein identifying the selected one of the first and second image signals to output to the image processing circuitry further comprises: in response to determining that the first image signal exceeds the predetermined threshold, overwriting the first image signal on the memory circuit with the second image signal. 5. The method defined in claim 4 , wherein identifying the selected one of the first and second image signals to output to the image processing circuitry further comprises: in response to determining that the first image signal exceeds the predetermined threshold, labeling the first image signal with an indication bit that instructs the readout circuitry to overwrite the first image signal on the memory circuit with the second image signal. 6. The method defined in claim 1 , wherein the first image signal comprises a first reset-level signal and a first image-level signal, the method further comprising: with the readout circuitry, sampling the first reset-level signal onto sample and hold circuitry; with analog-to-digital converter circuitry on the readout circuitry, converting the first reset-level signal into a first digital reset-level signal subsequent to sampling the first reset-level signal onto the sample and hold circuitry; with the readout circuitry, sampling the first image-level signal onto the sample and hold circuitry subsequent to converting the first reset-level signal into the first digital reset-level signal; and with the analog-to-digital converter circuitry, converting the first image-level signal into a first digital image-level signal subsequent to sampling the first image-level signal onto the sample and hold circuitry. 7. The method defined in claim 6 , wherein the second image signal comprises a second reset-level signal and a second image-level signal, the method further comprising: with the readout circuitry, sampling the second image-level signal onto the sample and hold circuitry; with the analog-to-digital converter circuitry, converting the second image-level signal into a second digital image-level signal subsequent to sampling the second image-level signal onto the sample and hold circuitry; with the readout circuitry, sampling the second reset-level signal onto the sample and hold circuitry subsequent to converting the second image-level signal into the second digital reset-level signal; with the analog-to-digital converter circuitry, converting the second reset-level signal into a second digital image-level signal subsequent to sampling the second reset-level signal onto the sample and hold circuitry. 8. The method defined in claim 7 , further comprising: with the readout circuitry, outputting the first image signal to the image processing circuitry without outputting the second image signal. 9. A method of operating an image sensor coupled to image processing circuitry, wherein the image sensor comprises an array of image sensor pixels and readout circuitry, the method comprising: with an image sensor pixel in the array, capturing a first image signal while a dual conversion gain gate in the image sensor pixel is turned off; with the image sensor pixel, capturing a second image signal subsequent to capturing the first image signal while the dual conversion gain gate is turned on; with a memory circuit in the readout circuitry, storing first image signal; with the readout circuitry, identifying a selected one of the first and second image signals to output to the image processing circuitry based on the captured first image signal, wherein identifying the selected one of the first and second image signals to output to the image processing circuitry comprises: determining whether the first image signal exceeds a predetermined threshold; and in response to determining that the first image signal exceeds the predetermined threshold, overwriting the first image signal on the memory circuit with the second image signal; and with the readout circuitry, outputting the identified image signal to the image processing circuitry. 10. The method defined in claim 9 , wherein identifying the selected one of the first and second image signals to output to the image processing circuitry further comprises: in response to determining that the first image signal exceeds the predetermined threshold, labeling the first image signal with an indication bit that instructs the readout circuitry to overwrite the first image signal on the memory circuit with the second image signal.

Assignees

Inventors

Classifications

  • comprising storage means other than floating diffusion · CPC title

  • H04N25/59Primary

    by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance · CPC title

  • H04N25/587Primary

    acquired sequentially, e.g. using the combination of odd and even image fields · CPC title

  • involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling · CPC title

  • Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title

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What does patent US9363450B2 cover?
An imaging system may include image processing circuitry and an image sensor having a pixel, readout circuitry, and control circuitry. The pixel may have a dual conversion gain gate for switching between a high conversion gain mode and a low conversion gain mode. The pixel may capture a first image signal while the dual conversion gain gate is turned of and a second image signal subsequent to c…
Who is the assignee on this patent?
Semiconductor Components Ind
What technology area does this patent fall under?
Primary CPC classification H04N25/59. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 07 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).