Single chip signal splitting carrier aggregation receiver architecture

US9362958B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9362958-B2
Application numberUS-201213411444-A
CountryUS
Kind codeB2
Filing dateMar 2, 2012
Priority dateMar 2, 2012
Publication dateJun 7, 2016
Grant dateJun 7, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A wireless communication device configured for receiving a multiple carrier signal is described. The wireless communication device includes a single-chip signal splitting carrier aggregation receiver architecture. The single-chip signal splitting carrier aggregation receiver architecture includes a primary antenna, a secondary antenna and a transceiver chip. The single-chip signal splitting carrier aggregation receiver architecture reuses a simultaneous hybrid dual receiver path.

First claim

Opening claim text (preview).

What is claimed is: 1. A wireless communication device configured for receiving a multiple carrier signal, comprising: a single-chip signal splitting carrier aggregation receiver architecture that comprises: a primary antenna; a secondary antenna; and a transceiver chip, wherein the single-chip signal splitting carrier aggregation receiver architecture reuses a simultaneous hybrid dual receiver path, the simultaneous hybrid dual receiver path comprising a first routing from the primary antenna through a primary receiver to a tertiary receiver and a second routing from the secondary antenna through a secondary receiver to a quaternary receiver, wherein the first routing comprises a third routing between a first stage amplifier of a source low noise amplifier of the primary receiver and a second stage amplifier of a target low noise amplifier of the tertiary receiver, and wherein the second routing comprises a fourth routing between a first stage amplifier of a source low noise amplifier of the secondary receiver and a second stage amplifier of a target low noise amplifier of the quaternary receiver. 2. The wireless communication device of claim 1 , wherein the single-chip signal splitting carrier aggregation receiver architecture does not require four antennas, a power splitter, an external low noise amplifier, or die-to-die signal routing. 3. The wireless communication device of claim 1 , wherein the transceiver chip comprises: a transmitter; the primary receiver; the secondary receiver; the tertiary receiver; and the quaternary receiver, wherein each receiver comprises multiple low noise amplifiers, and wherein each low noise amplifier comprises a first stage amplifier and a second stage amplifier. 4. The wireless communication device of claim 3 , wherein the first stage amplifier is a transconductance stage, and wherein the second stage amplifier is a cascode stage. 5. The wireless communication device of claim 3 , wherein the multiple low noise amplifiers comprise multiple low noise amplifiers for a first band and multiple low noise amplifiers for a second band. 6. The wireless communication device of claim 5 , wherein the first band is a low band and the second band is a mid band. 7. The wireless communication device of claim 5 , wherein the first band is a low band and the second band is a high band. 8. The wireless communication device of claim 5 , wherein the first band is a mid band and the second band is a high band. 9. The wireless communication device of claim 3 , wherein a fifth routing is used from the primary antenna through the primary receiver to obtain a primary inphase/quadrature signal, wherein a sixth routing is used from the primary antenna through the tertiary receiver to obtain a TRx inphase/quadrature signal, wherein a seventh routing is used from the secondary antenna through the secondary receiver to obtain a secondary inphase/quadrature signal, and wherein an eighth routing is used from the secondary antenna through the quaternary receiver to obtain a QRx inphase/quadrature signal. 10. The wireless communication device of claim 9 , wherein the single-chip signal splitting carrier aggregation receiver architecture is in inter-band operation, wherein the fifth routing passes through a first primary receiver low noise amplifier, wherein the sixth routing passes through a second primary receiver low noise amplifier, wherein the sixth routing passes through a first signal splitting stage, wherein the seventh routing passes through a first secondary receiver low noise amplifier, wherein the eighth routing passes through a second secondary receiver low noise amplifier, and wherein the eighth routing passes through a second signal splitting stage. 11. The wireless communication device of claim 9 , wherein the single-chip signal splitting carrier aggregation receiver architecture is in intra-band operation, wherein the fifth routing and the sixth routing pass through a primary receiver low noise amplifier, wherein the sixth routing passes through a first signal splitting stage, wherein the seventh routing and the eighth routing pass through a secondary receiver low noise amplifier, and wherein the eighth routing passes through a second signal splitting stage. 12. A method for receiving a multiple carrier signal using a single-chip signal splitting carrier aggregation receiver architecture, comprising: receiving a first signal using a primary antenna; routing the first signal through a primary receiver on a transceiver chip in the single-chip signal splitting carrier aggregation receiver architecture to obtain a primary inphase/quadrature signal; routing the first signal from a first stage amplifier of a source low noise amplifier of the primary receiver through a second stage amplifier of a target low noise amplifier of a tertiary receiver on the transceiver chip to obtain a TRx inphase/quadrature signal; receiving a second signal using a secondary antenna; routing the second signal through a secondary receiver on the transceiver chip to obtain a secondary inphase/quadrature signal; and routing the second signal from a first stage amplifier of a source low noise amplifier of the secondary receiver through a second stage amplifier a target low noise amplifier of a quaternary receiver on the transceiver chip to obtain a QRx inphase/quadrature signal. 13. The method of claim 12 , wherein the single-chip signal splitting carrier aggregation receiver architecture does not require four antennas, a power splitter, an external low noise amplifier, or die-to-die signal routing. 14. The method of claim 12 , wherein the transceiver chip comprises: a transmitter; the primary receiver; the secondary receiver; the tertiary receiver; and the quaternary receiver, wherein each receiver comprises multiple low noise amplifiers, and wherein each low noise amplifier comprises a first stage amplifier and a second stage amplifier. 15. The method of claim 14 , wherein the first stage amplifier is a transconductance stage, and wherein the second stage amplifier is a cascode stage. 16. The method of claim 14 , wherein the multiple low noise amplifiers comprise multiple low noise amplifiers for a first band and multiple low noise amplifiers for a second band. 17. The method of claim 16 , wherein the first band is a low band and the second band is a mid band. 18. The method of claim 16 , wherein the first band is a low band and the second band is a high band. 19. The method of claim 16 , wherein the first band is a mid band and the second band is a high band. 20. The method of claim 14 , wherein a first routing is used from the primary antenna through the primary receiver to obtain the primary inphase/quadrature signal, wherein a second routing is used from the primary antenna through the tertiary receiver to obtain the TRx inphase/quadrature signal, wherein a third routing is used from the secondary antenna through the secondary receiver to obtain the secondary inphase/quadrature signal, and wherein a fourth routing is used from the secondary antenna through the quaternary receiver to obtain the QRx inphase/quadrature signal. 21. The method of claim 20 , wherein the single-chip signal splitting carrier aggregation receiver architecture is in inter-band operation, wherein the first routing passes through a first primary receiver low noise amplifier, wherein the second routing passes through a second primary receiver low noise amplifier, wherein the second routing passes through

Assignees

Inventors

Classifications

  • H04B1/0057Primary

    using diplexing or multiplexing filters for selecting the desired band · CPC title

  • using two or more spaced independent antennas · CPC title

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Frequently asked questions

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What does patent US9362958B2 cover?
A wireless communication device configured for receiving a multiple carrier signal is described. The wireless communication device includes a single-chip signal splitting carrier aggregation receiver architecture. The single-chip signal splitting carrier aggregation receiver architecture includes a primary antenna, a secondary antenna and a transceiver chip. The single-chip signal splitting car…
Who is the assignee on this patent?
Gudem Prasad Srinivasa Siva, Sahota Gurkanwal Singh, Chang Li-Chung, and 3 more
What technology area does this patent fall under?
Primary CPC classification H04B1/0057. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 07 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).