Magnetic memory device having perpendicular magnetic tunnel junction pattern and method of forming the same

US9362486B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9362486-B2
Application numberUS-201514686761-A
CountryUS
Kind codeB2
Filing dateApr 14, 2015
Priority dateSep 29, 2014
Publication dateJun 7, 2016
Grant dateJun 7, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Provided are a magnetic memory device and a method of forming the same. The magnetic memory device includes a pinned pattern including a coupling enhancement pattern, a polarization enhancement pattern, and a texture blocking pattern located between the coupling enhancement pattern and the polarization enhancement pattern, a free pattern located on the polarization enhancement pattern of the pinned pattern, and a tunnel barrier located between the pinned pattern and the free pattern. The coupling enhancement pattern includes a first enhancement magnetic pattern, a second enhancement magnetic pattern, and a first enhancement non-magnetic pattern located between the first enhancement magnetic pattern and the second enhancement magnetic pattern.

First claim

Opening claim text (preview).

What is claimed is: 1. A magnetic memory device, comprising: a pinned pattern including a coupling enhancement pattern, a polarization enhancement pattern, and a texture blocking pattern disposed between the coupling enhancement pattern and the polarization enhancement pattern; a free pattern disposed on the polarization enhancement pattern of the pinned pattern; and a tunnel barrier disposed between the pinned pattern and the free pattern, wherein the coupling enhancement pattern comprises a first enhancement magnetic pattern, a second enhancement magnetic pattern, and a first enhancement non-magnetic pattern disposed between the first enhancement magnetic pattern and the second enhancement magnetic pattern. 2. The device of claim 1 , wherein the second enhancement magnetic pattern has substantially the same crystal structure as the first enhancement magnetic pattern. 3. The device of claim 1 , wherein the second enhancement magnetic pattern comprises substantially the same material as the first enhancement magnetic pattern. 4. The device of claim 1 , wherein the coupling enhancement pattern further comprises a second enhancement non-magnetic pattern disposed between the first enhancement non-magnetic pattern and the second enhancement magnetic pattern. 5. The device of claim 2 , wherein the first enhancement non-magnetic pattern has substantially the same crystal structure as the second enhancement magnetic pattern. 6. The device of claim 4 , wherein the second enhancement non-magnetic pattern has substantially the same crystal structure as the first enhancement non-magnetic pattern. 7. The device of claim 4 , wherein the coupling enhancement pattern further comprises a third enhancement magnetic pattern disposed between the first enhancement non-magnetic pattern and the second enhancement non-magnetic pattern. 8. The device of claim 7 , wherein the third enhancement magnetic pattern has substantially the same crystal structure as the first enhancement magnetic pattern. 9. A magnetic memory device, comprising: a first pinned pattern; a free pattern disposed on the first pinned pattern; a spacer disposed between the first pinned pattern and the free pattern; a first tunnel barrier disposed between the spacer and the free pattern; a coupling enhancement pattern disposed between the spacer and the first tunnel barrier; a polarization enhancement pattern disposed between the coupling enhancement pattern and the first tunnel barrier; and a texture blocking pattern disposed between the coupling enhancement pattern and the polarization enhancement pattern, wherein the coupling enhancement pattern comprises at least two interfaces disposed between a magnetic material layer and a non-magnetic material layer. 10. The device of claim 9 , wherein the coupling enhancement pattern comprises: a first enhancement magnetic pattern contacting the spacer; and a second enhancement magnetic pattern contacting the texture blocking pattern, wherein the first enhancement magnetic pattern and the second enhancement magnetic pattern comprise a magnetic material. 11. The device of claim 9 , further comprising: a capping pattern disposed on the free pattern; and a second tunnel barrier disposed between the free pattern and the capping pattern, wherein the second tunnel barrier has substantially the same crystal structure as the first tunnel barrier. 12. The device of claim 9 , wherein a crystallization temperature of the texture blocking pattern is higher than a crystallization temperature of the polarization enhancement pattern. 13. The device of claim 11 , wherein the second tunnel barrier comprises substantially the same material as the first tunnel barrier. 14. The device of claim 12 , wherein the texture blocking pattern comprises blocking non-magnetic patterns and a blocking magnetic pattern disposed between the blocking non-magnetic patterns. 15. The device of claim 14 , wherein the blocking magnetic pattern is amorphous. 16. A magnetic memory device, comprising: a pinned pattern including a plurality of patterns; a tunnel barrier pattern disposed on the pinned pattern; and a free pattern disposed on the pinned pattern; wherein: each of at least two interfaces between the patterns of the pinned pattern comprises a magnetic material to non-magnetic material interface; the patterns of the pinned pattern comprise first and second magnetic patterns and a non-magnetic pattern; and the at least two interfaces include a first interface between the first magnetic pattern and the non-magnetic pattern and a second interface between the second magnetic pattern and the non-magnetic pattern. 17. The device of claim 16 , wherein: the non-magnetic pattern is referred to as a first non-magnetic pattern; the patterns of the pinned pattern further comprise a second non-magnetic pattern; and the at least two interfaces further include a third interface between the second magnetic pattern and the second non-magnetic pattern. 18. The device of claim 16 , wherein: the at least two interfaces between the patterns of the pinned pattern comprises at least four interfaces; and each of the at least four interfaces comprises a magnetic material to non-magnetic material interface. 19. The device of claim 16 , wherein: the at least two interfaces between the patterns of the pinned pattern comprises at least five interfaces; and each of the at least five interfaces comprises a magnetic material to non-magnetic material interface.

Assignees

Inventors

Classifications

  • G11C11/161Primary

    details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

  • Electricity · mapped topic

  • H01L43/08Primary

    Electricity · mapped topic

  • H10N50/10Primary

    Magnetoresistive devices · CPC title

  • Manufacture or treatment · CPC title

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What does patent US9362486B2 cover?
Provided are a magnetic memory device and a method of forming the same. The magnetic memory device includes a pinned pattern including a coupling enhancement pattern, a polarization enhancement pattern, and a texture blocking pattern located between the coupling enhancement pattern and the polarization enhancement pattern, a free pattern located on the polarization enhancement pattern of the pi…
Who is the assignee on this patent?
Kim Keewon, Park Sanghwan, Kim Jaehoon, and 1 more
What technology area does this patent fall under?
Primary CPC classification G11C11/161. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 07 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).