Nanostructure semiconductor light emitting device

Patent metadata

Field	Value
Publication number	US-9362448-B2
Application number	US-201514686619-A
Country	US
Kind code	B2
Filing date	Apr 14, 2015
Priority date	Sep 5, 2014
Publication date	Jun 7, 2016
Grant date	Jun 7, 2016

Abstract

There is provided a nanostructure semiconductor light emitting device including a base layer formed of a first conductivity-type nitride semiconductor and a plurality of light emitting nanostructures disposed to be spaced apart from one another on the base layer. Each of the plurality of light emitting nanostructures includes a nanocore formed of the first conductivity-type nitride semiconductor, a stress control layer disposed on a surface of the nanocore and including a nitride semiconductor containing indium, an active layer disposed on the stress control layer and including a nitride semiconductor containing indium, and a second conductivity-type nitride semiconductor layer disposed on the active layer.

First claim

What is claimed is:

1. A nanostructure semiconductor light emitting device comprising:
a base layer formed of a first conductivity-type nitride semiconductor; and
a plurality of light emitting nanostructures disposed spaced apart from one another on the base layer,
wherein each of the plurality of light emitting nanostructures comprises:
a nanocore formed of the first conductivity-type nitride semiconductor;
a stress control layer disposed on a surface of the nanocore and including a nitride semiconductor containing indium;
an active layer disposed on the stress control layer and including a nitride semiconductor containing indium; and
a second conductivity-type nitride semiconductor layer disposed on the active layer.

2. The nanostructure semiconductor light emitting device of claim 1 , wherein the stress control layer comprises n number of layers containing indium, and
the stress control layer satisfies the equation

∑

i
=
1

n

⁢

⁢

x
i
2

⁢

t
i

>
0.12

,

where a content of indium in an i-th layer and a thickness of the i-th layer, among the layers containing indium, are expressed by x i (mole ratio) and t i (nm), respectively, and n is a natural number equal to or greater than 1.

3. The nanostructure semiconductor light emitting device of claim 1 , wherein the stress control layer comprises n number of layers containing indium, and
each of the layers containing indium satisfies the equation
x i 2 t i <0.4,

where a content of indium in an i-th layer and a thickness of the i-th layer, among the layers containing indium, are expressed by x i (mole ratio) and t i (nm), respectively, and n is a natural number equal to or greater than 1.

4. The nanostructure semiconductor light emitting device of claim 1 , wherein the stress control layer is an InGaN bulk layer.

5. The nanostructure semiconductor light emitting device of claim 1 , wherein the stress control layer has a superlattice structure in which first layers formed of In x1 Ga 1-x1 N and second layers formed of In x2 Ga 1-x2 N are alternatively stacked, where x 2 <x 1 <1 and 0≦x 2 <x 1 .

6. The nanostructure semiconductor light emitting device of claim 5 , wherein the second layers are formed of GaN.

7. The nanostructure semiconductor light emitting device of claim 5 , wherein at least one of the first layers has a content of indium different from those of the other first layers.

8. The nanostructure semiconductor light emitting device of claim 5 , wherein at least one of the first layers has a thickness different from those of the other first layers.

9. The nanostructure semiconductor light emitting device of claim 1 , wherein the active layer emits light having a peak wavelength equal to or greater than 535 nm.

10. The nanostructure semiconductor light emitting device of claim 1 , wherein the active layer has a structure in which quantum well layers formed of In y1 Ga 1-y1 N and quantum barrier layers formed of In y2 Ga 1-y2 N are alternatively stacked, where y 2 <y 1 <1 and 0≦y 2 <y 1 .

11. The nanostructure semiconductor light emitting device of claim 10 , wherein the content y 1 of indium in each of the quantum well layers is equal to or greater than 0.2.

12. The nanostructure semiconductor light emitting device of claim 10 , wherein the stress control layer has a superlattice structure in which first layers formed of In x1 Ga 1-x1 N and second layers formed of In x2 Ga 1-x2 N are alternately stacked, where x 2 <x 1 <1 and 0≦x 2 <x 1 .

13. The nanostructure semiconductor light emitting device of claim 12 , wherein the first layer is thinner than the quantum well layer.

14. The nanostructure semiconductor light emitting device of claim 12 , wherein the second layer is thinner than the quantum barrier layer.

15. The nanostructure semiconductor light emitting device of claim 12 , wherein the content x 1 of indium in the first layer is lower than the content y 1 of indium in the quantum well layer.

16. The nanostructure semiconductor light emitting device of claim 1 , wherein the stress control layer includes a nitride layer doped with a first conductivity-type impurity.

17. The nanostructure semiconductor light emitting device of claim 1 , further comprising a current suppressing intermediate layer disposed between a surface of a tip portion of each nanocore and the stress control layer.

18. The nanostructure semiconductor light emitting device of claim 17 , wherein the current suppressing intermediate layer is doped with a second conductivity-type impurity or is provided as an undoped nitride layer.

19. A light emitting device package comprising:
a package board having first and second electrode structures; and
a nanostructure semiconductor light emitting device mounted on the package board and electrically connected to the first and second electrode structures, the nanostructure semiconductor light emitting device comprising:
a base layer formed of a first conductivity-type nitride semiconductor; and
a plurality of light emitting nanostructures disposed spaced apart from one another on the base layer, each of the plurality of light emitting nanostructures comprising:
a nanocore formed of the first conductivity-type nitride semiconductor;
a stress control layer disposed on a surface of the nanocore and including a nitride semiconductor containing indium;
an active layer disposed on the stress control layer and including a nitride semiconductor containing indium; and
a second conductivity-type nitride semiconductor layer disposed on the active layer.

20. A lighting device comprising:
a nanostructure semiconductor light emitting device comprising:
a base layer formed of a first conductivity-type nitride semiconductor; and
a plurality of light emitting nanostructures disposed spaced apart from one another on the base layer, each of the plurality of light emitting nanostructures comprising:
a nanocore formed of the first conductivity-type nitride semiconductor;
a stress control layer disposed on a surface of the nanocore and including a nitride semiconductor containing indium;
an active layer disposed on the stress control layer and including a nitride semiconductor containing indium; and
a second conductivity-type nitride semiconductor layer disposed on the active layer;

a driving unit driving the nanostructure semiconductor light emitting device; and
an external connection unit supplying power from an external power source to the driving unit.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Choi Soo Jeong
• Kim Jung Sub
• Chung Byung Kyu
• Seo Yeon Woo
• Lee Dong Gun

Classifications

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10H20/818

  within the light-emitting regions · CPC title