Semiconductor light emitting device

US9362447B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9362447-B2
Application numberUS-201414508784-A
CountryUS
Kind codeB2
Filing dateOct 7, 2014
Priority dateJan 15, 2014
Publication dateJun 7, 2016
Grant dateJun 7, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

There is provided a semiconductor light emitting device. The device includes an n-type semiconductor layer, and a p-type semiconductor layer. The p-type semiconductor layer includes a plurality of first layers and second layers, each containing a p-type impurity and are alternately stacked. The impurity concentrations of the plurality of first layers increase in a direction away from the n-type semiconductor layer. An active layer is disposed between the n-type semiconductor layer and the p-type semiconductor layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor light emitting device comprising: an n-type semiconductor layer; a p-type semiconductor layer including a plurality of first and second layers, each containing a p-type impurity, the plurality of first and second layers are alternately stacked, and impurity concentrations of the plurality of first layers increase in a direction away from the n-type semiconductor layer; and an active layer disposed between the n-type semiconductor layer and the p-type semiconductor layer, wherein thicknesses of the plurality of first layers having increasing impurity concentrations increase in relation with the increase in impurity concentrations in the direction away from the n-type semiconductor layer. 2. The semiconductor light emitting device of claim 1 , wherein each of the plurality of second layers has an impurity concentration lower than that of the first layers immediately adjacent thereto. 3. The semiconductor light emitting device of claim 1 , wherein: thicknesses of each of the plurality of second layers are gradually decreased in a direction away from the active layer, and a maximum difference in thickness of the plurality of second layers is greater than a maximum difference in thickness of the plurality of first layers. 4. The semiconductor light emitting device of claim 1 , wherein respective thicknesses of the plurality of first layers are gradually increased in proportion to impurity concentrations in the direction away from the active layer. 5. The semiconductor light emitting device of claim 1 , wherein respective thicknesses of the plurality of second layers are gradually increased in the direction away from the active layer. 6. The semiconductor light emitting device of claim 5 , wherein respective thicknesses of the plurality of first layers are equal to or greater than those of the second layers adjacent thereto. 7. The semiconductor light emitting device of claim 1 , further comprising: a p-type contact layer disposed on the p-type semiconductor layer, wherein the p-type contact layer is disposed to be in contact with any one of the plurality of second layers. 8. The semiconductor light emitting device of claim 1 , wherein the active layer is disposed to be in contact with any one of the plurality of first layers included in the p-type semiconductor layer. 9. The semiconductor light emitting device of claim 1 , wherein an n-type impurity is doped in at least one of a plurality of interfaces between the plurality of first layers and the plurality of second layers. 10. The semiconductor light emitting device of claim 1 , wherein each of the plurality of second layers is doped with the p-type impurity diffused from the first layers. 11. The semiconductor light emitting device of claim 1 , wherein the p-type semiconductor layer includes a third layer disposed at an interface between the p-type semiconductor layer and the active layer. 12. The semiconductor light emitting device of claim 11 , wherein a thickness of the third layer is determined according to a thickness of the p-type semiconductor layer. 13. A light emitting device package comprising: a mounting board; the semiconductor light emitting device of claim 1 disposed on the mounting board; a wavelength conversion unit disposed at least on an upper surface of the semiconductor light emitting device; and an encapsulant surrounding the semiconductor light emitting device. 14. A light emitting device package comprising: a package body; the semiconductor light emitting device of claim 1 disposed on the package body; and an encapsulant surrounding the semiconductor light emitting device. 15. A semiconductor light emitting device comprising: an n-type semiconductor layer; an active layer disposed on the n-type semiconductor layer; and a p-type semiconductor layer disposed on the active layer and including pluralities of first and second layers which are alternately stacked, wherein: the plurality of first layers and the plurality of second layers include a p-type impurity, an impurity concentration of each of the plurality of first layers is higher than the impurity concentrations of the second layers adjacent thereto, and thicknesses of the plurality of first layers having the impurity concentrations higher than adjacent second layers increase in a direction away from the n-type semiconductor layer, wherein an impurity concentration of each of the plurality of first layers is higher than or equal to that of other first layers disposed closer to the active layer, and wherein thicknesses of each of the plurality of first layers are proportional to impurity concentrations of each of the plurality of first layers.

Assignees

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Classifications

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • changes in dispositions · CPC title

  • Forming coatings · CPC title

  • Dispositions of multiple bond wires · CPC title

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Frequently asked questions

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What does patent US9362447B2 cover?
There is provided a semiconductor light emitting device. The device includes an n-type semiconductor layer, and a p-type semiconductor layer. The p-type semiconductor layer includes a plurality of first layers and second layers, each containing a p-type impurity and are alternately stacked. The impurity concentrations of the plurality of first layers increase in a direction away from the n-type…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10H20/816. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 07 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).