Semiconductor device comprising a transistor comprising an oxide semiconductor layer

Patent metadata

Field	Value
Publication number	US-9362415-B2
Application number	US-201414575011-A
Country	US
Kind code	B2
Filing date	Dec 18, 2014
Priority date	Nov 16, 2012
Publication date	Jun 7, 2016
Grant date	Jun 7, 2016

Abstract

Oxide layers which contain at least one metal element that is the same as that contained in an oxide semiconductor layer including a channel are formed in contact with the top surface and the bottom surface of the oxide semiconductor layer, whereby an interface state is not likely to be generated at each of an upper interface and a lower interface of the oxide semiconductor layer. Further, it is preferable that an oxide layer, which is formed using a material and a method similar to those of the oxide layers be formed over the oxide layers Accordingly, the interface state hardly influences the movement of electrons.

First claim

What is claimed is:

1. A semiconductor device comprising:
a first oxide layer over a substrate;
an oxide semiconductor layer over the first oxide layer;
a second oxide layer over the oxide semiconductor layer;
a source electrode and a drain electrode over the second oxide layer; and
a third oxide layer in contact with the source electrode and the drain electrode,
wherein energy at a bottom of a conduction band of each of the first oxide layer and the second oxide layer is smaller than energy at a bottom of a conduction band of the oxide semiconductor layer.

2. The semiconductor device according to claim 1 ,
wherein the third oxide layer is provided over the second oxide layer, the source electrode, and the drain electrode, and
wherein the third oxide layer is in contact with the second oxide layer.

3. The semiconductor device according to claim 1 , wherein the energy at the bottom of the conduction band of the first oxide layer is smaller than that of the second oxide layer.

4. The semiconductor device according to claim 1 , wherein energy at a bottom of a conduction band of the third oxide layer is smaller than that of the second oxide layer.

5. The semiconductor device according to claim 1 , wherein energy at a bottom of a conduction band of the third oxide layer is equal to that of the second oxide layer.

6. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

7. The semiconductor device according to claim 1 , wherein the first oxide layer, the second oxide layer, and the third oxide layer each comprises at least one metal element contained in the oxide semiconductor layer.

8. A semiconductor device comprising:
a first oxide layer over a substrate;
an oxide semiconductor layer over the first oxide layer;
a second oxide layer over the oxide semiconductor layer;
a source electrode and a drain electrode over the second oxide layer;
a third oxide layer in contact with the source electrode and the drain electrode;
a gate insulating layer over the third oxide layer; and
a gate electrode over the gate insulating layer,
wherein energy at a bottom of a conduction band of each of the first oxide layer and the second oxide layer is smaller than energy at a bottom of a conduction band of the oxide semiconductor layer.

9. The semiconductor device according to claim 8 ,
wherein the third oxide layer is provided over the second oxide layer, the source electrode, and the drain electrode, and
wherein the third oxide layer is in contact with the second oxide layer.

10. The semiconductor device according to claim 8 , wherein the energy at the bottom of the conduction band of the first oxide layer is smaller than that of the second oxide layer.

11. The semiconductor device according to claim 8 , wherein energy at a bottom of a conduction band of the third oxide layer is smaller than that of the second oxide layer.

12. The semiconductor device according to claim 8 , wherein energy at a bottom of a conduction band of the third oxide layer is equal to that of the second oxide layer.

13. The semiconductor device according to claim 8 , wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

14. The semiconductor device according to claim 8 , wherein the first oxide layer, the second oxide layer, and the third oxide layer each comprises at least one metal element contained in the oxide semiconductor layer.

15. A semiconductor device comprising:
a first gate electrode over a substrate;
a first gate insulating layer over the first gate electrode;
a first oxide layer over the first gate insulating layer;
an oxide semiconductor layer over the first oxide layer;
a second oxide layer over the oxide semiconductor layer;
a source electrode and a drain electrode over the second oxide layer;
a third oxide layer in contact with the source electrode and the drain electrode;
a second gate insulating layer over the third oxide layer; and
a second gate electrode over the second gate insulating layer,
wherein energy at a bottom of a conduction band of each of the first oxide layer and the second oxide layer is smaller than energy at a bottom of a conduction band of the oxide semiconductor layer.

16. The semiconductor device according to claims 15 ,
wherein the third oxide layer is provided over the second oxide layer, the source electrode, and the drain electrode, and
wherein the third oxide layer is in contact with the second oxide layer.

17. The semiconductor device according to claim 15 , wherein the energy at the bottom of the conduction band of the first oxide layer is smaller than that of the second oxide layer.

18. The semiconductor device according to claim 15 , wherein energy at a bottom of a conduction band of the third oxide layer is smaller than that of the second oxide layer.

19. The semiconductor device according to claim 15 , wherein energy at a bottom of a conduction band of the third oxide layer is equal to that of the second oxide layer.

20. The semiconductor device according to claim 15 , wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

21. The semiconductor device according to claim 15 , wherein the first oxide layer, the second oxide layer, and the third oxide layer each comprises at least one metal element contained in the oxide semiconductor layer.

22. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises crystals which are aligned in a direction substantially perpendicular to a top surface of the oxide semiconductor layer.

23. The semiconductor device according to claim 8 , wherein the oxide semiconductor layer comprises crystals which are aligned in a direction substantially perpendicular to a top surface of the oxide semiconductor layer.

24. The semiconductor device according to claim 15 , wherein the oxide semiconductor layer comprises crystals which are aligned in a direction substantially perpendicular to a top surface of the oxide semiconductor layer.

Assignees

• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei

Classifications

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

• H10D30/6757

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H10D30/6755 Primary

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

• H10D99/00

  Subject matter not provided for in other groups of this subclass · CPC title