Method of manufacturing a silicon carbide semiconductor device

Patent metadata

Field	Value
Publication number	US-9362121-B2
Application number	US-201314439164-A
Country	US
Kind code	B2
Filing date	Oct 8, 2013
Priority date	Nov 28, 2012
Publication date	Jun 7, 2016
Grant date	Jun 7, 2016

Abstract

A silicon carbide substrate including a first impurity region, a well region, and a second impurity region separated from the first impurity region by the well region is prepared. A silicon dioxide layer is formed in contact with the first impurity region and the well region. A gate electrode is formed on the silicon dioxide layer. A silicon-containing material is formed on the first impurity region. The silicon-containing material is oxidized. The silicon dioxide layer includes a first silicon dioxide region on the first impurity region and a second silicon dioxide region on the well region. The thickness of the first silicon dioxide region is greater than the thickness of the second silicon dioxide region. Consequently, a silicon carbide semiconductor device capable of achieving improved switching characteristics while suppressing a decrease in drain current, and a method of manufacturing the same can be provided.

First claim

The invention claimed is:

1. A method of manufacturing a silicon carbide semiconductor device, comprising the steps of:
preparing a silicon carbide substrate, said silicon carbide substrate including a first impurity region having a first conductivity type, a well region being in contact with said first impurity region and having a second conductivity type different from said first conductivity type, and a second impurity region separated from said first impurity region by said well region and having said first conductivity type;
forming a silicon dioxide layer in contact with said first impurity region and said well region; and
forming a gate electrode on said silicon dioxide layer,
said step of forming a silicon dioxide layer including the steps of
forming a silicon-containing-material on said first impurity region,
oxidizing said silicon-containing-material, and
oxidizing a surface of said well region sandwiched between said first impurity region and said second impurity region,

said silicon dioxide layer including a first silicon dioxide region on said first impurity region, and a second silicon dioxide region on said well region sandwiched between said first impurity region and said second impurity region,
assuming that the thickness of said first silicon dioxide region is a first thickness and the thickness of said second silicon dioxide region is a second thickness, said first thickness being greater than said second thickness,
wherein said silicon-containing-material includes one of polysilicon, amorphous silicon, and amorphous silicon carbide.

2. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , wherein
the width of said silicon-containing-material is smaller than the width of said first impurity region.

3. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , wherein
a carbon concentration in said first silicon dioxide region is lower than a carbon concentration in said second silicon dioxide region.

4. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , wherein
said first thickness is 1.5 times or more and 5 times or less said second thickness.

5. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , wherein
in said step of forming a silicon dioxide layer, said step of oxidizing said silicon-containing-material and said step of oxidizing a surface of said well region are simultaneously performed.

6. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , wherein
in said step of forming a silicon dioxide layer, said step of forming a silicon-containing-material is performed after said step of oxidizing a surface of said well region.

7. The method of manufacturing a silicon carbide semiconductor device according to claim 6 , wherein
a temperature in said step of oxidizing said silicon-containing-material is lower than a temperature in said step of oxidizing a surface of said well region.

Assignees

• Sumitomo Electric Industries

Inventors

• Hiyoshi Toru
• Saitoh Yu

Classifications

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10P14/6308

  of Group IV semiconductors · CPC title

• H10D64/01366

  the semiconductor being silicon carbide · CPC title

• H10D64/516 Primary

  the thicknesses being non-uniform · CPC title

• H10D62/8325

  Silicon carbide · CPC title