Bidirectional two-base bipolar junction transistor devices, operation, circuits, and systems with collector-side base driven, diode-mode turn-on, double base short at initial turn-off, and two base junctions clamped by default

Patent metadata

Field	Value
Publication number	US-9356595-B2
Application number	US-201514792262-A
Country	US
Kind code	B2
Filing date	Jul 6, 2015
Priority date	Jun 24, 2013
Publication date	May 31, 2016
Grant date	May 31, 2016

Abstract

Methods, systems, circuits, and devices for power-packet-switching power converters using bidirectional bipolar transistors (BTRANs) for switching. Four-terminal three-layer BTRANs provide substantially identical operation in either direction with forward voltages of less than a diode drop. BTRANs are fully symmetric merged double-base bidirectional bipolar opposite-faced devices which operate under conditions of high non-equilibrium carrier concentration, and which can have surprising synergies when used as bidirectional switches for power-packet-switching power converters. BTRANs are driven into a state of high carrier concentration, making the on-state voltage drop very low.

First claim

What is claimed is:

1. A method for switching current through a power semiconductor device which includes both an n-type emitter/collector region, and also a p-type base contact region, on each of both first and second surfaces of a p-type semiconductor die, and which has an ON state and an OFF state, comprising:
at turn-on, when an external voltage difference is applied between the emitter/collector regions, shorting the more positive one of the emitter/collector regions together with the base contact region on the same one of the surfaces, to thereby conduct current through the power semiconductor device with a diode voltage drop characteristic of a p-n junction between the emitter/collector region on the other surface and the semiconductor die; and thereafter
in the ON state, removing the shorting and flowing base current through the base contact region on the first surface, which is nearer the more positive one of the emitter/collector regions, without flowing base current through the base contact region on the second surface;
during transition to the OFF state,
temporarily shorting the base contact region on the first surface to the emitter/collector region on the first surface, while also shorting the base contact region on the second surface to the emitter/collector region on the second surface, and thereafter
decoupling and floating at least the base contact region on the first surface;

in the OFF state, automatically enabling both a first voltage-limiting circuit which limits forward bias across a junction between the base contact region on the first surface and the emitter/collector region on the first surface to less than the forward diode voltage drop characteristic of the junction therebetween, and also a second voltage-limiting circuit which limits forward bias across a junction between the base contact region on the second surface and the emitter/collector region on the second surface to less than the forward diode voltage drop characteristic of the junction therebetween regardless of the voltage between the emitter/collector regions on the first and second surfaces;
wherein the base contact region on the first surface is not electrically connected to the base contact region on the second surface, except through the semiconductor die itself;
and wherein the emitter/collector region on the first surface is not directly electrically connected to the emitter/collector region on the second surface, except through the semiconductor die itself;
whereby bidirectional switching is achieved with an on-state voltage drop which is less than a diode drop between the semiconductor die and a respective one of the emitter/collector regions.

2. The method of claim 1 , wherein said first and second voltage-limiting circuits each comprise a series combination of a low-voltage diode and a normally-on switch; wherein the low-voltage diode turns on at a forward voltage which is less than the diode drop of a p-n junction between the respective emitter/collector region and the semiconductor die.

3. The method of claim 2 , wherein each said voltage-limiting circuit is connected so that, when the normally-on switch is on, the anode of the low-voltage diode is connected to the p-type base contact region, and the cathode of the low-voltage diode is connected to the n-type emitter/collector region.

4. The method of claim 2 , whereby, when the normally-on switch is ON, the p-n junction between the respective emitter/collector region and the semiconductor die cannot ever operate under forward bias.

5. The method of claim 1 , wherein the two surfaces of the semiconductor die are opposed faces.

6. The method of claim 1 , wherein the two surfaces of the semiconductor die are opposed faces, and the emitter/collector regions on the two surfaces are vertically aligned directly opposite each other.

7. The method of claim 1 , wherein the two surfaces of the semiconductor die are opposed faces, and the emitter/collector regions on the two surfaces are vertically aligned directly opposite each other, and the base regions on the two surfaces are also vertically aligned directly opposite each other.

8. The method of claim 1 , wherein the semiconductor die is silicon.

9. The method of claim 1 , whereby said shorting step allows current to flow between the shorted base contact and emitter/collector region on the opposite surfaces as through.

10. The method of claim 1 , wherein said step of flowing base current sources current to said base contact region.

11. The method of claim 1 , whereby externally sourced current between the emitter/collector regions on the first and second opposing surfaces can thereby be controllably switched regardless of the direction of the current.

12. A method for switching current through a power semiconductor device which includes first emitter/collector and base contact regions on a first surface of a semiconductor die, and second emitter/collector and base contact regions on a second surface of the die; wherein the emitter/collector regions both have a first conductivity type, and the base contact regions and the semiconductor die all have a second conductivity type; comprising:
at turn-on, when an applied voltage polarity is such that the emitter/collector region on the first of said surfaces can act as the collector of a vertical bipolar transistor while the emitter/collector region on the second of said surfaces acts as the emitter of the same vertical bipolar transistor,
beginning turn-on by shorting the base contact and emitter/collector regions on the first surface together, without driving the base contact region on the second surface, to thereby conduct current across the die as a diode without external base current power; and thereafter

in the ON state, flowing base current through the first base contact region, but substantially not through the second base contact region;
beginning turn-off by temporarily connecting the base contact and emitter/collector regions on the first surface together, while separately connecting the base contact and emitter/collector regions on the second surface together, without connecting the base contact region on the first surface to the base contact region on the second surface; and then
floating one, but not both, of the base contact regions;

in the OFF state, automatically enabling a respective voltage-limiting circuit on each said surface between the respective base contact and emitter/collector regions;
wherein each said voltage-limiting circuit comprises a voltage-limiting element and a normally-on switch in series, such that an anode of the voltage-limiting element is connected to the p side of a p-n junction between the respective base contact and emitter/collector regions, and a cathode is connected to the n side of the same junction;
wherein said voltage-limiting elements limit forward voltage on the respective junction to less than the forward diode voltage drop characteristic of the respective junction;

whereby leakage currents are not amplified when a control circuit is inactive, and breakdown voltage is not degraded by amplification of leakage currents; and
whereby bidirectional switching is achieved with an on-state voltage drop which is less than a diode drop between the semiconductor die and a respective one of the emitter/collector regions.

13. The method of claim 12 , wherein said voltage-limiting element is a Schottky diode.

14. The method of claim 12 , wherein the normally-on switch is a JFET.

15. The method of claim 12 , wherein the semiconductor die is silicon.

16. The method of claim 12 , wherein the step of flowing cu

Assignees

• Ideal Power Inc

Inventors

• Alexander William C
• Blanchard Richard A

Classifications

• H10D12/441

  Vertical IGBTs · CPC title

• H10D10/861

  having an emitter region comprising one or more non-monocrystalline elements of Group IV, e.g. amorphous silicon · CPC title

• H10D10/40

  Vertical BJTs {(Vertical Heterojunction BJTs H10D10/821)} · CPC title

• H10D62/137

  Collector regions of BJTs · CPC title

• H10D62/136

  of heterojunction BJTs  (vertical heterojunction BJTs having one or more non-monocrystalline Group IV elements H10D10/861) · CPC title