Capacitor arrangement for oscillator

Patent metadata

Field	Value
Publication number	US-9356557-B1
Application number	US-201514836759-A
Country	US
Kind code	B1
Filing date	Aug 26, 2015
Priority date	Aug 26, 2015
Publication date	May 31, 2016
Grant date	May 31, 2016

Abstract

In an example embodiment, an apparatus includes an LC circuit having a capacitive circuit and an inductive circuit connected in a circuit loop. In a first mode, a switching circuit in the inductive circuit provides a charge voltage across the LC circuit and prevents oscillation of the LC circuit by opening a switch in the circuit loop. In a second mode, the switching circuit enables the oscillation of the LC circuit by closing the switch in the circuit loop. The adjustable capacitive circuit includes capacitive branch circuits configured to contribute a first amount of capacitance when enabled. For each capacitive branch circuit, an initialization circuit couples the set of capacitors to a respective reference voltage in response to the capacitive branch circuit being disabled and the switching circuit operating in the first mode.

First claim

What is claimed is:

1. An apparatus, comprising:
an LC circuit including an adjustable capacitive circuit and an inductive circuit connected in a circuit loop with a first end of the adjustable capacitive circuit coupled to a first node and a second end of the adjustable capacitive circuit coupled to a second node;
wherein the inductive circuit includes one or more inductive elements and a switching circuit configured and arranged to
in a first mode, provide a direct-current (DC) charge voltage across the LC circuit and prevent oscillation of energy between the capacitive circuit and the inductive circuit by opening a switch in the circuit loop of the LC circuit, and
in a second mode, enable the oscillation of energy between the capacitive circuit and the inductive circuit by closing the switch in the circuit loop; and
wherein the adjustable capacitive circuit includes

a plurality of capacitive branch circuits, each having a respective set of capacitors and configured and arranged to contribute a first amount of capacitance between the first and second nodes when enabled and a second lesser amount of capacitance when disabled; and
an initialization circuit configured and arranged to, for each of the plurality of capacitive branch circuits, couple the capacitor branch circuit to a respective reference voltage in response to the capacitive branch circuit being disabled and the switching circuit operating in the first mode.

2. The apparatus of claim 1 , each capacitive branch circuit of the plurality of capacitive branch circuits includes a respective switching circuit configured and arranged to:
in an enabled mode, complete a respective circuit path, including the respective set of capacitors, between the first and second nodes, and
in a disabled mode, break the circuit path between the first and second nodes.

3. The apparatus of claim 2 , wherein:
the respective switching circuit in each capacitive branch circuit includes at least one transistor-based switch or parasitic PN junction subject to being turned on when an oscillating voltage is presented across the adjustable capacitive circuit, and
the initialization circuit is configured and arranged to maintain voltages of nodes in the capacitor branch circuits within a voltage range of a rail-to-rail supply voltage used to power the LC circuit.

4. The apparatus of claim 2 , wherein the initialization circuit is configured and arranged to, for each of the plurality of capacitive branch circuits,
limit, in response to a respective first control signal, charging of the set of capacitors.

5. The apparatus of claim 2 , wherein
the respective set of capacitors in each capacitive branch circuit includes:
a first capacitor having a first anode/cathode coupled to the first node and a second anode/cathode; and
a second capacitor having a first anode/cathode coupled to the second node and a second anode/cathode; and

the respective switching circuit in each capacitive branch circuit includes a transistor-based switch having a first end coupled to the second anode/cathode of the first capacitor and a second end coupled to the second anode/cathode of the second capacitor.

6. The apparatus of claim 5 , wherein the initialization circuit includes, for each of the plurality of capacitive circuits,
a first switch having a first end coupled to the second anode/cathode of the first capacitor and a second end coupled to a first power terminal, and
a second switch having a first end coupled to the second anode/cathode of the second capacitor and a second end coupled to a second power terminal.

7. The apparatus of claim 1 , wherein:
the one or more inductive elements includes a first inductor coil having a first end coupled to the first node and a second end, and a second inductor coil magnetically coupled with the first inductor coil and having a first end coupled to the second node and a second end; and
the switching circuit of the inductive circuit is further configured and arranged to:
in the first mode, uncouple the second end of the first inductor coil from the second end of the second inductor coil, couple the second end of the first inductor coil to a first power terminal, and couple the second end of the second inductor coil to a second power terminal; and
in the second mode, uncouple the second end of the first inductor coil from the first power terminal, uncouple the second end of the second inductor coil from the second power terminal, and couple the second end of the first inductor coil to the second end of the second inductor coil.

8. The apparatus of claim 7 , wherein:
the switching circuit of the inductive circuit is configured and arranged to operate in the first mode in response to a first control signal and operate in the second mode in response to a second control signal; and
the switching circuit of the inductive circuit includes
a first switch configured and arranged to couple the second end of the first inductor coil to the second end of the second inductor coil in response to the second control signal and to uncouple the second end of the first inductor coil from to the second end of the second inductor coil in response to the first control signal;
a second switch configured to couple the second end of the first inductor coil to the first power terminal in response to the first control signal and to uncouple the second end of the first inductor coil from the first power terminal in response to the second control signal; and
a third switch configured to couple the second end of the second inductor coil to the second power terminal in response to the first control signal and to uncouple the second end of the second inductor coil from the second power terminal in response to the second control signal.

9. The apparatus of claim 1 , further comprising an amplifier circuit coupled to the LC circuit and configured and arranged to sustain the oscillation of the LC circuit.

10. The apparatus of claim 9 , wherein the amplifier circuit includes:
a first inverter circuit having a first input coupled to the first node and a first output coupled to the second node; and
a second inverter circuit having a second input coupled to the first output and a second output coupled to the first input.

11. The apparatus of claim 10 , wherein:
each of the first and second inverter circuits includes a P-type transistor having a source coupled to a first power terminal and includes an N-type transistor having a drain coupled to a drain of the P-type transistor and a source coupled to a second power terminal; and
the apparatus further comprises a circuit configured to contribute additional transconductance to that of the P type transistor and the N type transistor of each of the inverter circuits.

12. The apparatus of claim 11 , wherein the circuit configured to contribute additional transconductance includes a plurality of auxiliary circuits, each auxiliary circuit having
a respective set of transistors including two P-type transistors and two N-type transistors;
a respective first set of switches configured to
when enabled, electrically connect each N-type transistor of the set of transistors in parallel with the N-type transistor of a respective one of the first and second inverter circuits and electrically connect each P-type transistor of the set of transistors in parallel with the P-type transistor of a respective one of the first and second inverter circuits, and
when disabled, electrically disconnect the set of transistors from the first and second inverter circuits; and

a respective second set of switches configured to, for each of the set of transistors, couple a source of the transistor to a dr

Assignees

• Nxp Bv

Inventors

• Gao Yuan
• Leong Frank
• Staszewski Robert Bogdan

Classifications

• H03L3/00

  Starting of generators · CPC title

• H03B5/1268

  switched inductors · CPC title

• H03J2200/10

  Tuning of a resonator by means of digitally controlled capacitor bank · CPC title

• H03B5/1228 Primary

  the amplifier comprising one or more field effect transistors · CPC title

• H03B2200/0094

  Measures to ensure starting of oscillations · CPC title