Tensile separation of a semiconducting stack

Patent metadata

Field	Value
Publication number	US-9356188-B2
Application number	US-201414480175-A
Country	US
Kind code	B2
Filing date	Sep 8, 2014
Priority date	Sep 6, 2013
Publication date	May 31, 2016
Grant date	May 31, 2016

Abstract

A stressor layer is applied to a semiconducting stack in order to separate the semiconducting stack at a predetermined depth. Tensile force is applied to the stressor layer, fracturing the semiconducting stack at the predetermined depth and allowing the resulting upper portion of the semiconducting stack to be used in manufacturing a semiconducting end-product (e.g., a light-emitting diode). The resulting lower portion of the semiconducting stack may be reused to grow a new semiconducting stack thereon.

First claim

What is claimed is:

1. A method of forming a light-emitting diode (LED), the method comprising:
forming a stressor layer on a layered stack, the layered stack including an active region, at least two conductive layers, and a base substrate, wherein the at least two conductive layers are formed on the base substrate and a pattern is included within the base substrate;
applying a force to the stressor layer to a fracture at a predetermined depth in the layered stack; and
separating an upper portion of the layered stack from a lower portion of the layered stack, the upper portion and the lower portion being divided by the fracture, wherein the pattern is preserved on a surface exposed by the fracture.

2. The method of claim 1 , wherein the at least two conductive layers are separated by the active region and include a layer of negatively-doped gallium nitride and a layer of positively-doped gallium nitride.

3. The method of claim 2 , wherein the fracture separates the layer of negatively-doped gallium nitride into an upper negatively-doped gallium nitride portion and a lower negatively-doped gallium nitride portion.

4. The method of claim 1 , wherein the fracture is formed along an interface between a gallium nitride layer and the base substrate.

5. The method of claim 2 , wherein the fracture separates the layer of negatively-doped gallium nitride from a layer of un-doped gallium nitride grown on the base substrate.

6. The method of claim 1 , further comprising:
depositing an additional active region and at least two additional conductive layers on the lower portion of the layered stack after the upper portion of the layered stack is separated from the lower portion of the layered stack.

7. The method of claim 6 , further comprising:
resurfacing a spalled surface of the lower portion of the layered stack prior to depositing the additional active region and the at least two additional conductive layers.

8. The method of claim 1 , further comprising:
forming an etch stop layer between the stressor layer and the at least two conductive layers.

9. The method of claim 1 , further comprising:
bonding the upper portion of the layered stack to a permanent substrate, wherein the permanent substrate is more thermally conductive than the base substrate.

10. The method of claim 1 , wherein the upper portion of the layered stack is configured to flow electricity between a first electrical contact adjacent to a conductive layer and a permanent substrate.

11. The method of claim 1 , further comprising:
etching to remove substantially all of the stressor layer from the upper portion of the layered stack.

12. The method of claim 1 , wherein the stressor layer is retained in the LED.

13. A light-emitting diode (LED) comprising:
an LED stack including an active region and at least two conductive layers, wherein a spalled surface of one of the conductive layers is bonded to a permanent substrate that is more thermally conductive than a base substrate on which the LED stack is originally formed.

14. The LED of claim 13 , further comprising:
one or more electrical contacts that permit the conduction of electricity through the LED.

15. The LED of claim 13 , wherein the LED has vertical architecture or a horizontal architecture.

16. A method of forming a light-emitting diode (LED), the method comprising:
forming a stressor layer on a layered stack, wherein the layered stack includes an active region, at least two conductive layers, and a base substrate;
applying a force to the stressor layer to create a fracture at a predetermined depth in the layered stack; and
separating an upper portion of the layered stack from a lower portion of the layered stack, the upper portion and the lower portion being divided by the fracture; and
bonding the upper portion of the layered stack to a permanent substrate, wherein the permanent substrate is more thermally conductive than the base substrate.

17. The method of claim 16 , wherein the fracture separates a layer of negatively-doped gallium nitride into an upper negatively-doped gallium nitride portion and a lower negatively-doped gallium nitride portion.

18. The method of claim 16 , wherein the fracture is formed along an interface between a gallium nitride layer and the base substrate.

19. The method of claim 16 , wherein the fracture further separates a layer of negatively-doped gallium nitride from a layer of un-doped gallium nitride grown on the base substrate.

20. The method of claim 16 , wherein a pattern is included within the base substrate or within one of the conductive layers and the pattern is preserved on a surface exposed by the fracture.

21. The method of claim 16 , further comprising:
depositing an additional active region and at least two additional conductive layers on the lower portion of the layered stack after the upper portion of the layered stack is separated from the lower portion of the layered stack.

22. The method of claim 16 , further comprising:
forming an etch stop layer between the stressor layer and the at least two conductive layers.

23. The method of claim 16 , further comprising:
etching to remove substantially all of the stressor layer from the LED stack.

24. A method of forming a light-emitting diode (LED), the method comprising:
forming a stressor layer on a layered stack, wherein the layered stack includes an active region and at least two conductive layers formed on a substrate;
applying a force to the stressor layer to create a fracture at a predetermined depth in the layered stack;
separating an upper portion of the layered stack from a lower portion of the layered stack, the upper portion and the lower portion being divided by the fracture; and
depositing an additional active region and at least two additional conductive layers on the lower portion of the layered stack after the upper portion of the layered stack is separated from the lower portion of the layered stack.

Assignees

• Veeco Instr Inc

Inventors

• Paranjpe Ajit
• Lee Jia
• Metzner Craig

Classifications

• H10H20/82

  Roughened surfaces, e.g. at the interface between epitaxial layers · CPC title

• H10H20/018 Primary

  Bonding of wafers · CPC title

• H01L33/0079 Primary

  Electricity · mapped topic

• H01L33/22

  Electricity · mapped topic