Semiconductor device, electronic device, and method of manufacturing semiconductor device

Patent metadata

Field	Value
Publication number	US-9356152-B2
Application number	US-201414164476-A
Country	US
Kind code	B2
Filing date	Jan 27, 2014
Priority date	Jan 28, 2005
Publication date	May 31, 2016
Grant date	May 31, 2016

Abstract

To provide a semiconductor device and a display device which can be manufactured through a simplified process and the manufacturing technique. Another object is to provide a technique by which a pattern of wirings or the like which is partially constitutes a semiconductor device or a display device can be formed with a desired shape with controllability.

First claim

What is claimed:

1. A semiconductor device comprising:
a first conductive layer extending in a first direction in top view;
a semiconductor layer adjacent to the first conductive layer;
an insulating layer between the first conductive layer and the semiconductor layer;
a second conductive layer electrically connected to the semiconductor layer, the second conductive layer extending in a second direction in top view so as to intersect with the first conductive layer;
wherein the first conductive layer comprises a convex portion extending in the second direction in top view,
wherein the convex portion overlaps with the second conductive layer and the semiconductor layer, and
wherein the semiconductor layer comprises indium and oxygen.

2. The semiconductor device according to claim 1 , further comprising:
a pixel electrode electrically connected to the semiconductor layer.

3. The semiconductor device according to claim 2 , further comprising:
a third conductive layer electrically connected to the semiconductor layer,
wherein the pixel electrode is electrically connected to the third conductive layer.

4. The semiconductor device according to claim 2 , wherein the pixel electrode is formed by a droplet discharge method.

5. The semiconductor device according to claim 1 , wherein the semiconductor layer comprises zinc and gallium.

6. The semiconductor device according to claim 1 ,
wherein the first conductive layer comprises a gate electrode layer,
wherein the second conductive layer comprises one of a source electrode layer and a drain electrode layer.

7. The semiconductor device according to claim 1 ,
wherein an edge of the semiconductor layer overlaps with the second conductive layer so that the semiconductor layer extends beyond a first edge of the second conductive layer and the semiconductor layer does not extend beyond a second edge of the second conductive layer, and
wherein the first edge is an opposite edge of the second edge.

8. A semiconductor device comprising:
a first conductive layer extending in a first direction in top view;
a first semiconductor layer adjacent to the first conductive layer;
an insulating layer between the first conductive layer and the first semiconductor layer;
a second conductive layer electrically connected to the first semiconductor layer, the second conductive layer extending in a second direction in top view so as to intersect with the first conductive layer;
a second semiconductor layer adjacent to the first conductive layer;
wherein the first conductive layer comprises a first convex portion extending in the second direction in top view,
wherein the first convex portion overlaps with the second conductive layer and the first semiconductor layer,
wherein the first conductive layer comprises a second convex portion extending in the second direction in top view,
wherein the second convex portion overlaps with the second semiconductor layer, and
wherein the first semiconductor layer comprises indium and oxygen.

9. The semiconductor device according to claim 8 , further comprising:
a pixel electrode electrically connected to the first semiconductor layer.

10. The semiconductor device according to claim 9 , further comprising:
a third conductive layer electrically connected to the first semiconductor layer,
wherein the pixel electrode is electrically connected to the third conductive layer.

11. The semiconductor device according to claim 9 , wherein the pixel electrode is formed by a droplet discharge method.

12. The semiconductor device according to claim 8 , wherein the first semiconductor layer comprises zinc and gallium.

13. The semiconductor device according to claim 8 , wherein the first direction is substantially perpendicular to the second direction in top view.

14. The semiconductor device according to claim 8 ,
wherein the first conductive layer comprises a gate electrode layer,
wherein the second conductive layer comprises one of a source electrode layer and a drain electrode layer.

15. The semiconductor device according to claim 8 ,
wherein an edge of the first semiconductor layer overlaps with the second conductive layer so that the first semiconductor layer extends beyond a first edge of the second conductive layer and the first semiconductor layer does not extend beyond a second edge of the second conductive layer, and
wherein the first edge is an opposite edge of the second edge.

16. A semiconductor device comprising:
a first conductive layer extending in a first direction in top view;
a semiconductor layer adjacent to the first conductive layer;
an insulating layer between the first conductive layer and the semiconductor layer;
a second conductive layer electrically connected to the semiconductor layer, the second conductive layer extending in a second direction in top view so as to intersect with the first conductive layer;
a pixel electrode electrically connected to the semiconductor layer,
wherein the first conductive layer comprises a convex portion extending in the second direction in top view,
wherein the convex portion overlaps with the second conductive layer and the semiconductor layer,
wherein the semiconductor layer comprises indium, zinc and oxygen, and
wherein the pixel electrode comprises indium, zinc and oxygen.

17. The semiconductor device according to claim 16 , wherein the semiconductor layer comprises gallium.

18. The semiconductor device according to claim 16 , wherein the first direction is substantially perpendicular to the second direction in top view.

19. The semiconductor device according to claim 16 , further comprising:
a third conductive layer electrically connected to the semiconductor layer,
wherein the pixel electrode is electrically connected to the third conductive layer.

20. The semiconductor device according to claim 16 ,
wherein the first conductive layer comprises a gate electrode layer,
wherein the second conductive layer comprises one of a source electrode layer and a drain electrode layer.

21. The semiconductor device according to claim 16 ,
wherein an edge of the semiconductor layer overlaps with the second conductive layer so that the semiconductor layer extends beyond a first edge of the second conductive layer and the semiconductor layer does not extend beyond a second edge of the second conductive layer, and
wherein the first edge is an opposite edge of the second edge.

22. The semiconductor device according to claim 16 , wherein the pixel electrode is formed by a droplet discharge method.

23. A semiconductor device comprising:
a first conductive layer extending in a first direction in top view;
a semiconductor layer over the first conductive layer;
an insulating layer between the first conductive layer and the semiconductor layer;
a second conductive layer over and electrically connected to the semiconductor layer, the second conductive layer extending in a second direction in top view so as to intersect with the first conductive layer;
a third conductive layer over the semiconductor layer;
a pixel electrode electrically connected to the semiconductor layer through the third conductive layer;
a liquid crystal layer over the pixel electrode,
wherein the first conductive layer comprises a convex portion extending in the second direction in top view,
wherein the convex portion overlaps with the second conductive layer, the third conductive layer, and the semiconductor layer,

Assignees

• Semiconductor Energy Lab

Inventors

• Isa Toshiyuki
• Morisue Masafumi
• Kawamata Ikuko

Classifications

• H10D86/481

  integrated with passive devices, e.g. auxiliary capacitors · CPC title

• H10D86/40

  characterised by multiple TFTs · CPC title

• H10D30/6755 Primary

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/0241

  using liquid deposition, e.g. printing · CPC title