Electronic package module and method for fabrication of the same
US-2024413067-A1 · Dec 12, 2024 · US
Land grid array semiconductor device packages
US9355992B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9355992-B2 |
| Application number | US-201414450998-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 4, 2014 |
| Priority date | Aug 25, 2005 |
| Publication date | May 31, 2016 |
| Grant date | May 31, 2016 |
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- Title
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Abstract
Official abstract text for this publication.
A semiconductor device package includes a land grid array package. At least one semiconductor die is mounted to an interposer substrate, with bond pads of the semiconductor die connected to terminal pads on the same side of the interposer substrate as the at least one semiconductor die. Terminal pads of the interposer substrate may be electrically connected to either or both of a peripheral array pattern of lands and to a central, two-dimensional array pattern of pads, both array patterns located on the opposing side of the interposer substrate from the at least one semiconductor die. Additional components, active, passive or both, may be connected to pads of the two-dimensional array to provide a system-in-a-package. Lead fingers of a lead frame may be superimposed on the opposing side of the interposer substrate, bonded directly to the land grid array land and wire bonded to pads as desired for repair or to ease routing problems on the interposer. The land grid array package may be mounted to a carrier substrate, and the lands wire bonded to conductive pads on the carrier substrate. Methods of fabrication are also disclosed.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of fabricating a semiconductor device package, the method comprising: providing an interposer substrate comprising a dielectric member, a plurality of terminals proximate and extending along at least one peripheral edge thereof on one side thereof and an array of lands proximate and extending along a same at least one peripheral edge on an opposing side of the interposer substrate, terminals of the plurality of terminals being respectively electrica…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9355992B2 cover?
- A semiconductor device package includes a land grid array package. At least one semiconductor die is mounted to an interposer substrate, with bond pads of the semiconductor die connected to terminal pads on the same side of the interposer substrate as the at least one semiconductor die. Terminal pads of the interposer substrate may be electrically connected to either or both of a peripheral arr…
- Who is the assignee on this patent?
- Micron Technology Inc
- What technology area does this patent fall under?
- Primary CPC classification H10W74/114. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue May 31 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).