Semiconductor device

Patent metadata

Field	Value
Publication number	US-9355988-B2
Application number	US-201514669169-A
Country	US
Kind code	B2
Filing date	Mar 26, 2015
Priority date	Apr 9, 2014
Publication date	May 31, 2016
Grant date	May 31, 2016

Abstract

A semiconductor device has a semiconductor element provided with a functional surface on which a functional circuit is formed and with a back surface facing in the opposite direction to the functional surface, while also having a lead supporting the semiconductor element and electrically connected to the semiconductor element, and a resin package covering at least a portion of the semiconductor element and the lead. The semiconductor element has a functional surface side electrode formed on the functional surface and equipped with a functional surface side raised part that projects in the direction in which the functional surface faces. The functional surface side raised part of the functional surface side electrode is joined to the lead by solid state bonding.

First claim

The invention claimed is:

1. A semiconductor device comprising:
a semiconductor element having a functional surface on which a functional circuit is formed and a back surface facing in an opposite direction to the functional surface;
a conduction supporting member supporting the semiconductor element and electrically connected to the semiconductor element; and
a resin package at least partially covering the semiconductor element and the conduction supporting member,
wherein the semiconductor element includes a functional surface side electrode that is formed on the functional surface and equipped with a functional surface side raised part projecting in a direction in which the functional surface faces,
the functional surface side raised part of the functional surface side electrode is joined to the conduction supporting member by solid state bonding,
the functional surface side electrode has a base layer that contacts the functional surface, and
the functional surface side electrode has a foundation layer laminated on the base layer.

2. The semiconductor device according to claim 1 , wherein the base layer is made of Al.

3. The semiconductor device according to claim 1 , wherein the functional surface side raised part and the base layer do not overlap with each other in plan view.

4. The semiconductor device according to claim 1 , wherein the foundation layer is made of one of Ti, W and Ta.

5. The semiconductor device according to claim 1 , wherein the functional surface side electrode has a redistribution layer laminated on the foundation layer, and
the functional surface side raised part is formed on the redistribution layer.

6. The semiconductor device according to claim 5 , wherein the redistribution layer is made of Cu.

7. The semiconductor device according to claim 5 , wherein the redistribution layer is larger than the base layer in plan view.

8. The semiconductor device according to claim 5 , wherein the functional surface side electrode has a joining promotion layer that is positioned as an uppermost layer.

9. The semiconductor device according to claim 8 , wherein the joining promotion layer of the functional surface side electrode contains at least one of Ni and Pd.

10. The semiconductor device according to claim 9 , wherein the joining promotion layer of the functional surface side electrode has a Ni layer laminated on the functional surface side raised part and a Pd layer laminated on the Ni layer.

11. The semiconductor device according to claim 5 , further comprising a passivation film covering the functional surface and having formed therein a through hole that allows the functional surface side electrode to reach the functional surface.

12. The semiconductor device according to claim 11 , wherein the passivation film is made of SiN.

13. The semiconductor device according to claim 11 , wherein the redistribution layer overlaps with the passivation film in plan view.

14. The semiconductor device according to claim 11 , wherein the functional surface side raised part overlaps with the passivation film in plan view.

15. The semiconductor device according to claim 11 , further comprising a protective film laminated on the passivation film.

16. The semiconductor device according to claim 15 , wherein the protective film is made of polyimide.

17. The semiconductor device according to claim 15 , wherein the redistribution layer overlaps with the protective film in plan view.

18. The semiconductor device according to claim 15 , wherein the functional surface side raised part overlaps with the protective film in plan view.

19. The semiconductor device according to claim 1 , wherein the functional surface side raised part is made of Cu.

20. The semiconductor device according to claim 1 , wherein the semiconductor element has a plurality of the functional surface side electrode.

21. A semiconductor device, comprising:
a semiconductor element having a functional surface on which a functional circuit is formed and a back surface facing in an opposite direction to the functional surface;
a conduction supporting member supporting the semiconductor element and electrically connected to the semiconductor element; and
a resin package at least partially covering the semiconductor element and the conduction supporting member,
wherein the semiconductor element includes a functional surface side electrode that is formed on the functional surface and equipped with a functional surface side raised part projecting in a direction in which the functional surface faces,
the functional surface side raised part of the functional surface side electrode is joined to the conduction supporting member by solid state bonding, and
the conduction supporting member is a lead made of a metal, and a portion the lead projects from the resin package.

22. A semiconductor device, comprising:
a semiconductor element having a functional surface on which a functional circuit is formed and a back surface facing in an opposite direction to the functional surface;
a conduction supporting member supporting the semiconductor element and electrically connected to the semiconductor element; and
a resin package at least partially covering the semiconductor element and the conduction supporting member,
wherein the semiconductor element includes a functional surface side electrode that is formed on the functional surface and equipped with a functional surface side raised part projecting in a direction in which the functional surface faces,
the functional surface side raised part of the functional surface side electrode is joined to the conduction supporting member by solid state bonding, and
the functional surface side electrode has a plurality of the functional surface side raised part.

23. A semiconductor device, comprising:
a semiconductor element having a functional surface on which a functional circuit is formed and a back surface facing in an opposite direction to the functional surface;
a conduction supporting member supporting the semiconductor element and electrically connected to the semiconductor element; and
a resin package at least partially covering the semiconductor element and the conduction supporting member,
wherein the semiconductor element includes a functional surface side electrode that is formed on the functional surface and equipped with a functional surface side raised part projecting in a direction in which the functional surface faces,
the functional surface side raised part of the functional surface side electrode is joined to the conduction supporting member by solid state bonding,
the semiconductor device comprises a heat dissipation member joined to the semiconductor element,
the semiconductor element has a back surface metal layer formed on the back surface, and
the back surface metal layer of the semiconductor element is joined to the heat dissipation member by solid state bonding.

24. The semiconductor device according to claim 23 , wherein a joining promotion layer is laminated on the back surface metal layer.

25. The semiconductor device according to claim 24 , wherein the joining promotion layer on the back surface metal layer contains at least one of Ni and Pd.

26. The semiconductor device according to claim 23 , wherein a joining promotion layer is laminated on the heat dissipation member.

27. The semiconductor device according to claim 26 , wher

Assignees

• Rohm Co Ltd

Inventors

• Fujii Kenji
• Kasuya Yasumasa
• Yamagami Mamoru
• Kinoshita Naoki
• Haga Motoharu

Classifications

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/726

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W76/17

  characterised by their materials · CPC title

• H10W74/40

  characterised by their materials · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title