Sigma-delta modulation apparatus and sigma-delta modulation power amplifier

Patent metadata

Field	Value
Publication number	US-9350578-B2
Application number	US-201414543954-A
Country	US
Kind code	B2
Filing date	Nov 18, 2014
Priority date	Jan 2, 2014
Publication date	May 24, 2016
Grant date	May 24, 2016

Abstract

To suppress noise generation in a wide band and to suppress a clock speed from being increased in a sigma-delta modulation apparatus and a sigma-delta modulation power amplifier. A sigma-delta modulator creates a sigma-delta modulated signal for a digital output from a digital modulator, according to a clock given in advance. A threshold comparator indexes a portion in which the level of a digital output from the digital modulator is higher than a predetermined threshold and sends the resulting output. A replacing unit replaces the indexed portion with an output from a corresponding thinning unit. A filter unit performs band elimination filter processing on an output from the replacing unit and a digital-to-analog converter (D/A) performs digital-to-analog conversion on an output from the filter unit.

First claim

What is claimed is:

1. A sigma-delta modulation apparatus, comprising:
circuitry configured to:
index a portion of a digital transmission signal from a digital modulator, the portion being higher than a predetermined threshold;
generate a pulse-density-modulated (PDM) pulse based on the digital transmission signal according to a clock signal;
replace the indexed portion of the digital transmission signal with an output portion from a thinning circuit to produce a composite signal;
remove a spectral band from the composite signal; and
convert the composite signal into an analog signal.

2. The sigma-delta modulation apparatus of claim 1 , wherein the circuitry is further configured to index the portion of the digital transmission signal with a signal level that is higher than the predetermined threshold.

3. The sigma-delta modulation apparatus of claim 2 , wherein the predetermined threshold is determined with parameters of the sigma-delta modulation apparatus including distortion, efficient output and value of an error vector magnitude (EVM).

4. The sigma-delta modulation apparatus of claim 3 , wherein the generated PDM pulse is used only for periods during which an absolute value of the transmission signal exceeds the predetermined threshold.

5. The sigma-delta modulation apparatus of claim 1 , wherein the circuitry is further configured to generate the clock signal.

6. The sigma-delta modulation apparatus of claim 1 , wherein the thinning circuit is configured to select the generated PDM pulse at a predetermined ratio.

7. The sigma-delta modulation apparatus of claim 1 , wherein the circuitry is further configured to pre-distort the composite signal so as to suppress a distortion of a power amplifier.

8. The sigma-delta modulation apparatus of claim 7 , wherein the circuitry is further configured to pre-distort the composite signal using at least one of a look-up table pre-distorter and an approximate polynomial pre-distorter.

9. The sigma-delta modulation apparatus of claim 7 , wherein the circuitry is further configured to convert the pre-distorted composite signal into an analog signal.

10. The sigma-delta modulation apparatus of claim 1 , wherein the circuitry is further configured to exclude digital-analog conversion noise from the converted analog signal and transmit the composite signal to a power amplifier.

11. The sigma-delta modulation apparatus of claim 10 , wherein the circuitry is further configured to block components of a frequency band immediately adjacent to a transmission band (TxSg) of the composite signal such that a blocked band is equivalent to a single transmission bandwidth.

12. The sigma-delta modulation apparatus of claim 1 , wherein the circuitry is further configured to index the portion of the digital transmission signal by marking the portion with an indicator that indicates that an absolute value of the digital transmission signal in the portion is greater than the predetermined threshold.

13. A sigma-delta modulation power amplifier, comprising:
circuitry configured to:
envelope modulated I and Q signals generated by a digital modulator;
create phase components for the modulated I and Q signals, respectively;
perform a sigma-delta modulation on the enveloped signals, wherein performing the sigma-delta modulation includes indexing a portion of a digital transmission signal, the portion being higher than a predetermined threshold;
delay the phase components in order to establish synchronization in time between the phase components and the enveloped signals;
generate a sigma-delta quadrature modulated signal using the sigma-delta modulated signal and the delayed phase components; and
amplify the generated sigma-delta quadrature modulated signal.

14. The sigma-delta modulation power amplifier of claim 13 , wherein the circuitry is further configured to:
generate a pulse-density-modulated (PDM) pulse based on the digital transmission signal according to a clock signal;
replace the indexed portion of the digital transmission signal with an output portion from a thinning circuit to produce a composite signal;
remove a spectral band from the composite signal; and
convert the composite signal into an analog signal.

15. The sigma-delta modulation power amplifier of claim 13 , wherein the circuitry is further configured to envelope the modulated I and Q signals according to:
Env =√( I 2 +Q 2 )

wherein I, Q are the output signals from the digital modulator.

16. The sigma-delta modulation power amplifier of claim 13 , wherein the circuitry is further configured to create the phase components for the modulated I and Q signals according to:
phase=tan −1 ( Q/I )
wherein I, Q are the output signals from the digital modulator.

17. A sigma-delta modulation power amplifier, comprising:
circuitry configured to:
perform a sigma-delta modulation on a modulated I signal;
perform a sigma-delta modulation on a modulated Q signal, wherein the modulated I and Q signals are generated by a digital modulator;
perform a quadrature modulation on the sigma-delta modulated I and Q signals;
amplify the quadrature modulated signals,
index a portion of a digital transmission signal from the digital modulator, the portion being higher than a predetermined threshold;
generate a pulse-density-modulated (PDM) pulse based on the digital transmission signal according to a clock signal;
replace the indexed portion of the digital transmission signal, with an output portion from a thinning circuit to produce a composite signal;
remove a spectral band from the composite signal; and
convert the composite signal into an analog signal.

18. The sigma-delta modulation power amplifier of claim 17 , wherein the circuitry is further configured to:
up-convert the sigma-delta modulated I and Q signals; and
add the up-converted sigma-delta modulated I and Q signals into the quadrature modulated signals.

19. A sigma-delta modulation method, comprising:
generating, via circuitry of a sigma-delta modulation apparatus, a digital transmission signal by a digital modulator;
indexing, via the circuitry, a portion of a digital transmission signal by a threshold comparator, the portion being higher than a predetermined threshold;
generating, via the circuitry, a pulse-density-modulated (PDM) pulse by a sigma-delta modulator based on the digital transmission signal and in accordance with a clock signal;
replacing, via the circuitry, the portion of the digital transmission signal, by replacing circuitry, with an output portion from a thinning circuit;
producing, via the circuitry, a composite signal;
removing, via the circuitry, a spectral band from the composite signal by a filter; and
converting, via the circuitry, the composite signal into an analog signal by a digital to analog converter.

20. The sigma-delta modulation method of claim 19 , further comprising:
linearizing, via the circuitry, the composite signal in order to suppress the distortion of a power amplifier.

21. The sigma-delta modulation method of claim 20 , wherein the linearizing further comprises pre-distorting the composite signal using at least one of a look-up table pre-distorter and an approximate polynomial pre-distorter.

Assignees

• Sony Corp

Inventors

• Kusunoki Shigeo

Classifications

• H04L25/4902 Primary

  Pulse width modulation; Pulse position modulation · CPC title

• H04B1/7103

  the interference being multiple access interference · CPC title

• H03F3/2175

  using analogue-digital or digital-analogue conversion (H03F3/2173 takes precedence) · CPC title

• H03M3/30

  Delta-sigma modulation · CPC title

• H03M3/504

  the final digital/analogue converter being constituted by a finite impulse response [FIR] filter, i.e. FIRDAC · CPC title