Digital phase-locked loop supply voltage control

Patent metadata

Field	Value
Publication number	US-9350365-B2
Application number	US-201414490358-A
Country	US
Kind code	B2
Filing date	Sep 18, 2014
Priority date	Sep 18, 2014
Publication date	May 24, 2016
Grant date	May 24, 2016

Abstract

Some embodiments include apparatuses and methods having a digitally controlled oscillator (DCO) in a digital phase-locked loop (PLL) and a control loop. The DCO can generate an output signal having a frequency based on a value of a digital information. The control loop can adjust a value of a supply voltage of the DCO based on the value the digital information. Additional apparatuses and methods are described.

First claim

What is claimed is:

1. An apparatus comprising:
a digitally controlled oscillator to generate an output signal having a frequency based on a value of a digital information; and
a control loop to adjust a value of a supply voltage of the digitally controlled oscillator based on the value the digital information, the control loop arranged to adjust the value of the supply voltage if the value the digital information is outside a value range, wherein the digital information has a minimum value and a maximum value, and the value range of the digital information has lower limit greater than the minimum value and an upper limit less than the maximum value.

2. The apparatus of claim 1 , wherein the value range of the digital information is associated with a portion of a frequency range of the output signal.

3. An apparatus comprising:
a digitally controlled oscillator to generate an output signal having a frequency based on a value of a digital information; and
a control loop to adjust a value of a supply voltage of the digitally controlled oscillator based on the value the digital information, the control loop arranged to adjust the value of the supply voltage if the value the digital information is outside a value range, the control loop including a monitor to monitor the value of the digital information and generate information based on the value of the digital information, and a voltage generator to generate the supply voltage and to adjust the value of the supply voltage based on the information generated by the monitor, wherein the voltage generator includes:
a voltage generating unit to generate a voltage;
a filter to generate a filtered voltage from the voltage; and
a driver to provide the supply voltage based on the filtered voltage.

4. The apparatus of claim 3 , wherein the voltage generating unit includes a bandgap reference generator to generate the voltage.

5. The apparatus of claim 4 , wherein the bandgap reference generator includes an adjustable resistor having a resistance value based on the value of the digital information, and the value of the voltage is based at least in part on the resistance value.

6. The apparatus of claim 3 , wherein the voltage generating unit includes an adjustable resistor divider to generate the voltage.

7. The apparatus of claim 6 , wherein the adjustable resistor divider includes an adjustable resistor having a resistance value based on the value of the digital information.

8. An apparatus comprising:
a digitally controlled oscillator in a digital phase-locked loop to generate an output signal;
a first control loop to generate a digital information to control a frequency of the digitally controlled oscillator; and
a second control loop to adjust a value of a supply voltage provided to the digitally controlled oscillator if the value the digital information is outside a value range, wherein the digitally controlled oscillator includes inverting stages arranged in a ring arrangement, and capacitive loads coupled to the inverting stages, each of the capacitor loads having a capacitance value based on the value of the digital information.

9. An apparatus comprising:
a digitally controlled oscillator in a digital phase-locked loop to generate an output signal;
a first control loop to generate a digital information to control a frequency of the digitally controlled oscillator; and
a second control loop to adjust a value of a supply voltage provided to the digitally controlled oscillator if the value the digital information is outside a value range, wherein the second control loop is arranged to perform at least one of decreasing the value of the supply voltage if the value of the digital information is less than a value of a lower limit of the value range, and increasing the value of the supply voltage if the value of the digital information is greater than a value of an upper limit of the value range.

10. An apparatus comprising:
a digitally controlled oscillator in a digital phase-locked loop to generate an output signal;
a first control loop to generate a digital information to control a frequency of the digitally controlled oscillator; and
a second control loop to adjust a value of a supply voltage provided to the digitally controlled oscillator if the value the digital information is outside a value range, wherein the second control loop includes:
a circuit to generate a voltage;
an RC filter to receive the voltage and generate a filtered voltage; and
a driver to receive the filtered voltage and provide the supply voltage.

11. The apparatus of claim 10 , wherein the circuit includes a bandgap reference generator to generate the voltage.

12. The apparatus of claim 10 , wherein the circuit includes an adjustable resistor divider to generate the voltage.

13. An apparatus comprising:
a digitally controlled oscillator in a digital phase-locked loop to generate an output signal;
a first control loop to generate a digital information to control a frequency of the digitally controlled oscillator; and
a second control loop to adjust a value of a supply voltage provided to the digitally controlled oscillator if the value the digital information is outside a value range, wherein the second control loop is arranged to operate at a frequency less than a frequency of the first control loop.

14. A system comprising:
memory device; and
a processor coupled to the memory device, the processor including:
a digital phase-locked loop including a digital controlled oscillator to generate an output signal having a frequency based on a value of a digital information; and
a control loop to adjust a value of a supply voltage provided to the digitally controlled oscillator if the value the digital information is outside a value range, wherein the control loop includes a bandgap reference generator to generate a bandgap reference voltage, and a driver to provide the supply voltage based on the bandgap reference voltage to the digitally controlled oscillator.

15. The system of claim 14 , wherein the memory device and the processor are located on a same die.

16. The system of claim 14 , wherein the bandgap reference generator is arranged to receive an additional digital information to control the value of the bandgap reference voltage.

17. A method comprising:
generating a digital information at a digital phase-locked loop;
generating an output signal at a digitally controlled oscillator of the digital phase-locked loop, such that the output signal has a frequency based on the digital information;
monitoring a value of the digital information; and
adjusting a value of a supply voltage of the digital phase-locked loop if the value the digital information is outside a value range, wherein adjusting the value of the supply voltage includes at least one of decreasing the value of the supply voltage if the value of the digital information is less than a lower limit of the value range, and increasing the value of the supply voltage if the value of the digital information is greater than an upper limit of the value range.

18. The method of claim 17 , further comprising:
bringing the value of the digital information inside the value range after the value of the supply voltage is adjusted.

Assignees

• Intel Corp

Inventors

• Familia Noam
• Saksonov Avigdor
• Fayneh Eyal
• Shor Joseph

Classifications

• H03L7/083

  the reference signal being additionally directly applied to the generator · CPC title

• H03L7/18

  using a frequency divider or counter in the loop (H03L7/20, H03L7/22 take precedence) · CPC title

• H03L7/0991 Primary

  the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider (H03L7/0995 takes precedence; fixed oscillators with means for selecting among various phases H03L7/0814) · CPC title

• H03L7/095

  using a lock detector (H03L7/087 takes precedence) · CPC title

• H03L5/00

  Automatic control of voltage, current, or power · CPC title