Level shift circuit and switching power source apparatus

Patent metadata

Field	Value
Publication number	US-9350352-B2
Application number	US-94624710-A
Country	US
Kind code	B2
Filing date	Nov 15, 2010
Priority date	Nov 19, 2009
Publication date	May 24, 2016
Grant date	May 24, 2016

Abstract

A level shift circuit includes a first resistor connected to a level shift power source, a first transistor having a drain connected to a second end of the first resistor and a source to the ground, a second resistor connected to the level shift power source, a second transistor having a drain connected to a second end of the second resistor and a source to the ground, a pulse generator controlling ON/OFF of the first and second transistors according to an input signal, a control part generating a set signal if the first transistor is ON, a reset signal if the second transistor is ON, and no signal if there is no voltage difference between a voltage at the drain of the first transistor and a voltage at the drain of the second transistor, and a flip-flop providing an output signal according to the set and reset signals.

First claim

What is claimed is:

1. A level shift circuit comprising:
a first resistor having a first end being connected to a level shift power source;
a first n-type MOSFET having a drain connected to a second end of the first resistor and a source connected to the ground;
a second resistor having a first end connected to the level shift power source, the first and second resistors having the same resistance value;
a second n-type MOSFET having a drain connected to a second end of the second resistor and a source connected to the ground;
a pulse generator configured to control ON/OFF of the first and second n-type MOSFETs according to an input signal;
a control part configured to generate a set signal as the first n-type MOSFET is ON, a reset signal as the second n-type MOSFET is ON, and no signal as there is no voltage difference between a voltage at the drain of the first n-type MOSFET and a voltage at the drain of the second n-type MOSFET; and
a flip-flop configured to provide an output signal according to the set and reset signals generated by the control part, the output signal being a level-shifted signal of the input signal, wherein
the control part includes:
a fifth resistor having a first end connected to the level shift power source;
a third n-type MOSFET having a drain connected to a second end of the fifth resistor and a set terminal of the flip-flop, a source connected to the drain of the first n-type MOSFET, and a gate connected to the drain of the second-type MOSFET;
a sixth resistor having a first end connected to the level shift power source, the fifth and sixth resistors having the same resistance value; and
a fourth n-type MOSFET having a drain connected to a second end of the sixth resistor and a reset terminal of the flip-flop, a source connected to the drain of the second n-type MOSFET, and a gate connected to the drain of the first n-type MOSFET.

2. The level shift circuit of claim 1 , further comprising:
a seventh resistor connected between the source of the first n-type MOSFET and the ground; and
an eighth resistor connected between the source of the second n-type MOSFET and the ground.

3. A switching power source apparatus having a high-side switching element and a low-side switching element comprising the level shift circuit of claim 1 for controlling the high-side switching element.

4. A level shift circuit comprising:
a first resistor having a first end being connected to a level shift power source;
a first n-type MOSFET having a drain connected to a second end of the first resistor and a source connected to the ground;
a second resistor having a first end connected to the level shift power source, the first and second resistors having the same resistance value;
a second n-type MOSFET having a drain connected to a second end of the second resistor and a source connected to the ground;
a pulse generator configured to control ON/OFF of the first and second n-type MOSFETs according to an input signal;
a control part configured to generate a set signal as the first n-type MOSFET is ON, a reset signal as the second n-type MOSFET is ON, and no signal as there is no voltage difference between a voltage at the drain of the first n-type MOSFET and a voltage at the drain of the second n-type MOSFET; and
a flip-flop configured to provide an output signal according to the set and reset signals generated by the control part, the output signal being a level-shifted signal of the input signal, wherein
a first amplifier arranged between the control part and the flip-flop, the first amplifier being configured to amplify the set signal of the control part so that the set signal is detected by the flip-flop; and
a second amplifier arranged between the control part and the flip-flop and configured to amplify the reset signal generated of the control part so that the reset signal is detected by the flip-flop.

5. The level shift circuit of claim 4 , wherein:
the first amplifier includes a first p-type MOSFET and a third resistor that are connected in series between the level shift power source and a level shift reference voltage point having a predetermined voltage difference with respect to the level shift power source;
the second amplifier includes a second p-type MOSFET and a fourth resistor that are connected in series between the level shift power source and the level shift reference voltage;
the first p-type MOSFET turns on and off according to the set signal generated by the control part; and
the second p-type MOSFET turns on and off according to the reset signal generated by the control part.

6. The level shift circuit of claim 4 , wherein the control part includes:
a fifth resistor having a first end connected to the level shift power source;
a third n-type MOSFET having a drain connected to a second end of the fifth resistor and a set terminal of the flip-flop, a source connected to the drain of the first n-type MOSFET, and a gate connected to the drain of the second n-type MOSFET;
a sixth resistor having a first end connected to the level shift power source, the fifth and sixth resistors having the same resistance value; and
a fourth n-type MOSFET having a drain connected to a second end of the sixth resistor and a reset terminal of the flip-flop, a source connected to the drain of the second n-type MOSFET, and a gate connected to the drain of the first n-type MOSFET.

7. The level shift circuit of claim 5 , wherein the control part includes:
a fifth resistor having a first end connected to the level shift power source;
a third n-type MOSFET having a drain connected to a second end of the fifth resistor and a set terminal of the flip-flop, a source connected to the drain of the first n-type MOSFET, and a gate connected to the drain of the second n-type MOSFET;
a sixth resistor having a first end connected to the level shift power source, the fifth and sixth resistors having the same resistance value; and
a fourth n-type MOSFET having a drain connected to a second end of the sixth resistor and a reset terminal of the flip-flop, a source connected to the drain of the second n-type MOSFET, and a gate connected to the drain of the first n-type MOSFET.

Assignees

• Koike Kengo
• Sanken Electric Co Ltd

Inventors

• Koike Kengo

Classifications

• H03K19/017509

  Interface arrangements · CPC title

• H03K19/018521 Primary

  of complementary type, e.g. CMOS · CPC title

• H03K19/018514

  with at least one differential stage (H03K19/018528 and H03K19/018542 take precedence) · CPC title

• H03K19/018507

  Interface arrangements · CPC title

• H03K19/0185

  using field effect transistors only · CPC title