System and method for generating an auxiliary voltage

Patent metadata

Field	Value
Publication number	US-9350342-B2
Application number	US-201414473377-A
Country	US
Kind code	B2
Filing date	Aug 29, 2014
Priority date	Aug 29, 2014
Publication date	May 24, 2016
Grant date	May 24, 2016

Abstract

In accordance with an embodiment, a circuit includes a first normally-on transistor having a drain coupled to a first switching output node, a normally-off transistor having a drain coupled to a source of the first normally-on transistor, a driver circuit configured to receive a switching signal, the driver circuit having an output coupled to a gate of the first normally-on transistor, and a second normally-on transistor having a drain terminal coupled to a supply node, a gate terminal coupled to the output of the driver circuit, and a source terminal configured to provide an auxiliary voltage.

First claim

What is claimed is:

1. A circuit comprising:
a first normally-on transistor having a drain coupled to a first switching output node;
a normally-off transistor having a drain coupled to a source of the first normally-on transistor;
a driver circuit configured to receive a switching signal, the driver circuit having an output coupled to a gate of the first normally-on transistor; and
a second normally-on transistor having a drain terminal coupled to a supply node, a gate terminal coupled to the output of the driver circuit, and a source terminal configured to provide an auxiliary voltage.

2. The circuit of claim 1 , further comprising a capacitor coupled between the source of the second normally-on transistor and a source of the normally-off transistor.

3. The circuit of claim 1 , wherein the driver circuit further comprises a first power supply terminal coupled to a source of the first normally-on transistor, and a second power supply terminal configured to be coupled to a driver reference voltage node.

4. The circuit of claim 3 , further comprising a power supply circuit coupled between the first power supply terminal of the driver circuit and the second power supply terminal of the driver circuit.

5. The circuit of claim 4 , wherein the source of the normally-off transistor is configured to be coupled to ground.

6. The circuit of claim 1 , further comprising a switch coupled between the supply node and the first switching output node.

7. The circuit of claim 1 , wherein the supply node is configured to have a voltage of at least 100 V.

8. The circuit of claim 1 , wherein the first normally-on transistor and the second normally-on transistor comprise gallium nitride (GaN) high electron mobility transistors (HEMTs).

9. The circuit of claim 1 , wherein the normally-off transistor comprises an enhancement mode MOSFET device.

10. The circuit of claim 1 , wherein the first normally-on transistor and the second normally-on transistor are disposed on a same semiconductor substrate.

11. The circuit of claim 1 , wherein the auxiliary voltage is coupled to startup circuitry.

12. A method of operating a switching circuit comprising a first normally-on transistor having a drain terminal coupled to a first switching output node, a normally-off transistor having a drain terminal coupled to a source terminal of the first normally-on transistor, a driver circuit having an output coupled to a gate terminal of the first normally-on transistor, a second normally-on transistor having a drain terminal coupled to a supply node and a gate terminal coupled to the output of the driver circuit, the method comprising:
receiving a switching signal at an input of the driver circuit;
driving the first normally-on transistor and the second normally-on transistor with the driver circuit according to the received switching signal; and
generating an auxiliary voltage at a source terminal of the second normally-on transistor.

13. The method of claim 12 , further comprising low pass filtering the auxiliary voltage using a capacitor coupled between the source terminal of the second normally-on transistor and a source terminal of the normally-off transistor.

14. The method of claim 12 , further comprising turning on the normally-off transistor.

15. The method of claim 12 , further comprising turning on and turning off a switch coupled between the first switching output node and the supply node.

16. The method of claim 12 , wherein the first normally-on transistor and the second normally-on transistor comprise gallium nitride (GaN) high electron mobility transistors (HEMTs).

17. The method of claim 12 , further comprising providing the auxiliary voltage to a startup circuit.

18. A power supply system comprising:
a first switching circuit comprising a driver and a switch, wherein the driver of the first switching circuit is coupled to a first power supply;
a second switching circuit coupled in series with the first switching circuit, wherein the first switching circuit comprises
a first normally-on transistor having a drain coupled to a first switching output node,
a normally-off transistor having a drain coupled to a source of the first normally-on transistor,
a driver circuit configured to receive a switching signal, the driver circuit having an output coupled to a gate of the first normally-on transistor, and
a second normally-on transistor having a drain terminal coupled to a supply node, a gate terminal coupled to the output of the driver circuit, and a source terminal coupled to an auxiliary voltage node; and

a power-on circuit having a power supply coupled to the auxiliary voltage node, the power-on circuit configured to provide power to the driver of the first switching circuit when a voltage of the first power supply is below a first threshold.

19. The power supply of claim 18 , further comprising an inductor coupled between a first AC input terminal and a first input node between the first switching circuit and the second switching circuit.

20. The power supply of claim 19 , wherein the first normally-on transistor and the second normally-on transistor comprise gallium nitride (GaN) high electron mobility transistors (HEMTs).

Assignees

• Infineon Technologies Austria

Inventors

• Zojer Bernhard

Classifications

• H03K17/133

  in field-effect transistor switches · CPC title

• H03K17/687 Primary

  the devices being field-effect transistors · CPC title

• H03K19/017509

  Interface arrangements · CPC title

• H02M7/217 Primary

  using semiconductor devices only · CPC title

• H03K2217/0081

  Power supply means, e.g. to the switch driver · CPC title