Over-current protection circuit and pulse width modulator having the same

Patent metadata

Field	Value
Publication number	US-9350158-B2
Application number	US-201414318625-A
Country	US
Kind code	B2
Filing date	Jun 28, 2014
Priority date	Apr 7, 2014
Publication date	May 24, 2016
Grant date	May 24, 2016

Abstract

An over-current protection circuit and a pulse width modulator having the same are provided. The pulse width module includes a high-side switch, a low-side switch, and a driving module. The driving module controls the high-side switch and the low-side switch according to a set signal and a reset signal periodically to adjust an inductive current flowing through the high-side switch and the low-side switch. When inductive current is the overcurrent during the minimum on time of the high-side switch, the over-current protection circuit turns off the high-side switch in a predefined time to decrease the inductive current continuously, so that the average current of the inductive current does not become too high to damage the pulse width module.

First claim

What is claimed is:

1. An over-current protection circuit, adapted for a pulse width modulator, the pulse width modulator comprising a trigger, a high-side switch, a low-side switch, a driving module and a control element, the trigger receiving a clock signal and according to the clock signal generating a set signal to the control element periodically, and the high-side switch connected electrically to the low-side switch, the driving module controlling the high-side switch and the low-side switch according to the set signal and a reset signal periodically to adjust an inductive current flowing through the high-side switch and the low-side switch, the control element turning on the high-side switch by at least one minimum on time, and after the minimum on time the driving module detecting whether the inductive current flowing through the high-side switch is larger than an overcurrent level, and generating an overcurrent signal when the inductive current is detected larger than the overcurrent level, the over-current protection circuit comprising:
a first pulse generator, receiving the clock signal to generate a judging signal periodically, and a judging time of the judging signal being larger than the minimum on time;
a counting unit, receiving the judging signal; and
an overcurrent judging unit, receiving the judging signal and the overcurrent signal to control whether the trigger outputs the set signal, wherein when the overcurrent judging unit judges the inductive current to be overcurrent according to the judging signal and the overcurrent signal, the overcurrent judging unit stops the trigger outputting the set signal to the driving module, and the counting unit counts for a predefined time according to the judging signal, and the overcurrent judging unit permits the trigger to output the set signal to the driving module periodically after the counting unit finishes counting for the predefined time.

2. The over-current protection circuit according to claim 1 , wherein the overcurrent judging unit comprises:
an AND gate, receiving the judging signal and the overcurrent signal to generate an activating signal;
a latch, generating a latch signal according to the activating signal; and
a first NOT gate, generating an on/off signal to the trigger and the counting unit according to the latch signal, to control whether the trigger outputs the set signal to the driving module and to control whether the counting unit starts to count for the predefined time according to the judging signal.

3. The over-current protection circuit according to claim 2 , wherein the counting unit comprises:
a second NOT gate, receiving the judging signal to invert the judging signal;
at least one D flip-flop, receiving the inverted judging signal to count the judging signal according to the on/off signal and the amount of the D flip-flop, and generating a count terminating signal after finishing counting the judging signal; and
a second pulse generator, receiving the count terminating signal to generate a restoring signal to the latch, so as to enable the first NOT gate to generate the on/off signal to the trigger, so that the trigger is permitted to output the set signal to the driving module periodically.

4. The over-current protection circuit according to claim 1 , wherein the counting unit comprises:
a second NOT gate, receiving the judging signal to invert the judging signal;
at least one D flip-flop, counting the judging signal according to the amount of the D flip-flop when the overcurrent judging unit stops the trigger outputting the set signal to the driving module, and the D flip-flop generating a count terminating signal after finishing counting the judging signal; and
a second pulse generator, receiving the count terminating signal to generate a restoring signal to the overcurrent judging unit, to permit the trigger to output the set signal to the driving module periodically.

5. The over-current protection circuit according to claim 1 , wherein the trigger is a positive edge-triggered circuit or a negative edge-triggered circuit.

6. A pulse width modulator having over-current protection, comprising:
a trigger, receiving a clock signal to generate a set signal periodically;
a high-side switch;
a low-side switch, connected electrically to the high-side switch;
a driving module, controlling the high-side switch and the low-side switch according to the set signal and a reset signal periodically to adjust an inductive current flowing through the high-side switch and the low-side switch, wherein the driving module turns on the high-side switch for at least one minimum on time, and after the minimum on time the driving module detects whether the inductive current flowing through the high-side switch is larger than an overcurrent level, and generates an overcurrent signal when the inductive current is detected larger than the overcurrent level; and
an over-current protection circuit comprising:
a first pulse generator, receiving the clock signal to generate a judging signal periodically, and a judging time of the judging signal being larger than the minimum on time;
a counting unit, receiving the judging signal; and
an overcurrent judging unit, receiving the judging signal and the overcurrent signal to control whether the trigger outputs the set signal, wherein when the overcurrent judging unit judges the inductive current to be overcurrent according to the judging signal and the overcurrent signal, the overcurrent judging unit stops the trigger outputting the set signal to the driving module, and the counting unit counts for a predefined time according to the judging signal, and the overcurrent judging unit permits the trigger to output the set signal to the driving module periodically after the counting unit finishes counting for the predefined time.

7. The pulse width modulator according to claim 6 , wherein the overcurrent judging unit comprises:
an AND gate, receiving the judging signal and the overcurrent signal to generate an activating signal;
a latch, generating a latch signal according to the activating signal; and
a first NOT gate, generating an on/off signal to the trigger and the counting unit according to the latch signal, to control whether the trigger outputs the set signal to the driving module and to control whether the counting unit starts to count for the predefined time according to the judging signal.

8. The pulse width modulator according to claim 7 , wherein the counting unit comprises:
a second NOT gate, receiving the judging signal to invert the judging signal;
at least one D flip-flop, receiving the inverted judging signal to count the judging signal according to the on/off signal and the amount of the D flip-flop, and generating a count terminating signal after finishing counting the judging signal; and
a second pulse generator, receiving the count terminating signal to generate a restoring signal to the latch, so as to enable the first NOT gate to generate the on/off signal to the trigger, so that the trigger is permitted to output the set signal to the driving module periodically.

9. The pulse width modulator according to claim 6 , wherein the counting unit comprises:
a second NOT gate, receiving the judging signal to invert the judging signal;
at least one D flip-flop, counting the judging signal according to the amount of the D flip-flop when the overcurrent judging unit stops the trigger outputting the set signal to the driving module, and the D flip-flop generating a count terminating signal after finishing counting the judging signal; and
a second pulse generator, receiving the count terminating signal to generate a restoring signal to the overcurrent judging unit, to permit the trigger to outpu

Assignees

• Anpec Electronics Corp

Inventors

• Chen Chih-Yuan
• Chang Hsiang-Chung

Classifications

• H02H7/1213

  for DC-DC converters · CPC title

• H02H3/0935 Primary

  the timing being determined by numerical means · CPC title

• H02M1/08 Primary

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

• H02M1/32

  Means for protecting converters other than automatic disconnection · CPC title

• H03K17/0822

  in field-effect transistor switches · CPC title