Failover handling in modular switched fabric for data storage systems
US-2015370666-A1 · Dec 24, 2015 · US
US9348786B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9348786-B2 |
| Application number | US-201514625858-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 19, 2015 |
| Priority date | Feb 25, 2010 |
| Publication date | May 24, 2016 |
| Grant date | May 24, 2016 |
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A semiconductor memory device including a plurality of memory die and a controller die. The controller die is connected to an internal control bus. The controller die is configured to provide to a selected one of the memory die an internal read command responsive to an external read command. The selected memory die is configured to provide read data to the controller in response to the internal read command; wherein latency between receipt by the controller die of the external read command and receipt of the read data from the selected memory die differs for at least two of the memory die when selected as the selected memory die.
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What is claimed is: 1. A system comprising: a memory controller configured to supply a global clock signal and an external read command via an external control bus; and a memory device separate from the memory controller and comprising a plurality of memory dies and a controller die, the memory device being communicatively coupled to the external control bus to receive the global clock signal and the external read command, and the controller die being configured to provide an in…
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