Technique for accessing content-addressable memory

Patent metadata

Field	Value
Publication number	US-9348762-B2
Application number	US-201213720755-A
Country	US
Kind code	B2
Filing date	Dec 19, 2012
Priority date	Dec 19, 2012
Publication date	May 24, 2016
Grant date	May 24, 2016

Abstract

A tag unit configured to manage a cache unit includes a coalescer that implements a set hashing function. The set hashing function maps a virtual address to a particular content-addressable memory unit (CAM). The coalescer implements the set hashing function by splitting the virtual address into upper, middle, and lower portions. The upper portion is further divided into even-indexed bits and odd-indexed bits. The even-indexed bits are reduced to a single bit using a XOR tree, and the odd-indexed are reduced in like fashion. Those single bits are combined with the middle portion of the virtual address to provide a CAM number that identifies a particular CAM. The identified CAM is queried to determine the presence of a tag portion of the virtual address, indicating a cache hit or cache miss.

First claim

The invention claimed is:

1. A computer-implemented method for accessing a memory module within a plurality of memory modules, the method comprising:
parsing a virtual address into a first portion, a second portion, and a third portion;
parsing the first portion into even-indexed bits and odd-indexed bits, wherein each of the even-indexed bits has a different even-numbered index within the virtual address and each of the odd-indexed bits has a different odd-numbered index within…

Assignees

• Nvidia Corp

Inventors

• Fahs Brian
• Anderson Eric T
• Barrow-Williams Nick
• Gadre Shirish
• Mccormack Joel James
• Nordquist Bryon S
• Saxena Nirmal Raj
• Shah Lacky V

Classifications

• G06F12/1027 Primary

  Physics · mapped topic

• G06F12/1018 Primary

  Physics · mapped topic