Apparatus and method for managing power among a plurality of processors sharing a thermal platform

US9348656B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9348656-B2
Application numberUS-201113329988-A
CountryUS
Kind codeB2
Filing dateDec 19, 2011
Priority dateDec 19, 2011
Publication dateMay 24, 2016
Grant dateMay 24, 2016

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Abstract

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A method and apparatus includes a multi-processor apparatus including a plurality of integrated circuit processors having a shared thermal platform. Each processor has at least one subsystem operable at a plurality of different power settings, at least one internal thermal parameter detector providing power data related to the processor, and a power management unit. The method and apparatus illustratively shares power data from the at least one internal thermal parameter detector of each processor between the power management units of the plurality of processors; compares the shared power data from the plurality of processors to a thermal design power limit for the shared thermal platform; and controls a power setting of the at least one subsystem of the plurality of processors within the shared thermal platform based on the comparison of the shared power data to the thermal design power limit for the shared thermal platform.

First claim

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What is claimed is: 1. A method comprising: sharing power data between a plurality of power management units of a plurality of integrated circuit processors having a shared thermal platform that allows for heat dissipation from the plurality of integrated circuit processors, the power data being from at least one internal thermal parameter detector of each of the plurality of processors; comparing the shared power data from the plurality of processors to a thermal design power (…

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What does patent US9348656B2 cover?
A method and apparatus includes a multi-processor apparatus including a plurality of integrated circuit processors having a shared thermal platform. Each processor has at least one subsystem operable at a plurality of different power settings, at least one internal thermal parameter detector providing power data related to the processor, and a power management unit. The method and apparatus ill…
Who is the assignee on this patent?
Presant Stephen D, Branover Alexander J, Khodorkovsky Oleksandr, and 2 more
What technology area does this patent fall under?
Primary CPC classification G06F9/5094. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 24 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).