Dynamic compute composition
US-2024311210-A1 · Sep 19, 2024 · US
US9348656B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9348656-B2 |
| Application number | US-201113329988-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 19, 2011 |
| Priority date | Dec 19, 2011 |
| Publication date | May 24, 2016 |
| Grant date | May 24, 2016 |
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A method and apparatus includes a multi-processor apparatus including a plurality of integrated circuit processors having a shared thermal platform. Each processor has at least one subsystem operable at a plurality of different power settings, at least one internal thermal parameter detector providing power data related to the processor, and a power management unit. The method and apparatus illustratively shares power data from the at least one internal thermal parameter detector of each processor between the power management units of the plurality of processors; compares the shared power data from the plurality of processors to a thermal design power limit for the shared thermal platform; and controls a power setting of the at least one subsystem of the plurality of processors within the shared thermal platform based on the comparison of the shared power data to the thermal design power limit for the shared thermal platform.
Opening claim text (preview).
What is claimed is: 1. A method comprising: sharing power data between a plurality of power management units of a plurality of integrated circuit processors having a shared thermal platform that allows for heat dissipation from the plurality of integrated circuit processors, the power data being from at least one internal thermal parameter detector of each of the plurality of processors; comparing the shared power data from the plurality of processors to a thermal design power (…
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