Method of fabricating a wiring board

Patent metadata

Field	Value
Publication number	US-9345143-B2
Application number	US-201514741545-A
Country	US
Kind code	B2
Filing date	Jun 17, 2015
Priority date	Oct 3, 2008
Publication date	May 17, 2016
Grant date	May 17, 2016

Abstract

A wiring board includes an electrode pad having a first surface and a second surface located on an opposite side from the first surface, a conductor pattern connected to the first surface of the electrode pad, and an insulator layer embedded with the electrode pad and the conductor pattern. The insulator layer covers an outer peripheral portion of the second surface of the electrode pad.

First claim

What is claimed is:

1. A method of fabricating a wiring board, comprising:
a metal layer forming step forming a metal layer on a support plate made of a first metal;
an electrode pad forming step forming an electrode pad on the metal layer;
a projecting part forming step forming a projecting part by etching the metal layer, and exposing an outer peripheral portion of a surface of the electrode pad in contact with the projecting part;
an insulator layer forming step forming an insulator layer to cover the projecting part, the electrode pad, and a surface of the support plate formed with the projecting part, after the projecting part forming step;
a conductor pattern forming step forming, on the insulator layer, a conductor pattern connected to the electrode pad;
a support plate removing step removing the support plate by an etching, after the conductor pattern forming step; and
a projecting part removing step removing the projecting part, after the conductor pattern forming step, to thereby expose a portion of the surface of the electrode pad in contact with the projecting part and form in the insulator layer an opening having a shape corresponding to a shape of the projecting part.

2. The method of fabricating the wiring board as claimed in claim 1 , wherein the metal layer is made of a material having an electrical conductivity different from that of the first metal.

3. The method of fabricating the wiring board as claimed in claim 1 , wherein the electrode pad is made of the first metal.

4. The method of fabricating the wiring board as claimed in claim 1 , wherein the electrode pad forming step includes successively stacking, on the metal layer, a first metal layer made of a metal different from the first metal, a second metal layer made of a metal different from the first metal, and a third metal layer made of the first metal, to thereby form the electrode pad.

5. The method of fabricating the wiring board as claimed in claim 4 , wherein the electrode pad forming step forms the second metal layer using a metal forming the metal layer.

6. The method of fabricating the wiring board as claimed in claim 1 , further comprising:
a step forming an Organic Solderability Preservative (OSP) layer on a portion of the electrode pad exposed from the insulator layer by carrying out an Organic Solderability Preservative (OSP) process.

Assignees

• Shinko Electric Ind Co

Inventors

• Kodani Kotaro
• Kaneko Kentaro
• Kobayashi Kazuhiro

Classifications

• H10W70/687

  characterized by the outer layers being for protection, e.g. solder masks, or for protection against chemical or mechanical damage · CPC title

• H10W70/655

  Fan-out layouts · CPC title

• H05K2201/09472

  Recessed pad for surface mounting; Recessed electrode of component · CPC title

• H05K3/4682

  Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil · CPC title

• Y10T29/49155

  Manufacturing circuit on or in base · CPC title