Active pixel sensor imaging system

US9344655B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9344655-B2
Application numberUS-201514754394-A
CountryUS
Kind codeB2
Filing dateJun 29, 2015
Priority dateJun 30, 2014
Publication dateMay 17, 2016
Grant dateMay 17, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An active pixel sensor imaging system is disclosed. In one aspect, the system includes a plurality of active pixel sensor circuits arranged into an array of rows and columns. Each active pixel sensor is connected to a supply line and a column line, and operable to generate a voltage output through the column line corresponding to a detected light intensity. The system includes a current sensing circuit, located external to the plurality of active pixel sensor circuits and connected to the supply line. The current sensing circuit is implemented as a current mirror for sensing a current through an active pixel sensor circuit readout transistor. The system includes a feedback circuit, located external to the plurality of active pixel sensor circuits and connected to the column line, to a current generator and to the current sensing circuit. The feedback circuit is implemented as a classAB current mirror configured for controlled quiescent current.

First claim

Opening claim text (preview).

What is claimed is: 1. An active pixel sensor imaging system, comprising: a plurality of active pixel sensor circuits arranged into an array of rows and columns, at least one of said active pixel sensor circuits being connected to a supply line and a column line and operable to generate a voltage output through the column line corresponding to a detected light intensity; a current sensing circuit, located external to the plurality of active pixel sensor circuits and connected to the supply line, the current sensing circuit being implemented as a current mirror for sensing a current through an active pixel sensor circuit readout transistor; and a feedback circuit, located external to the plurality of active pixel sensor circuits and connected to the column line, to a current generator and to the current sensing circuit, the feedback circuit being implemented as a classAB current mirror configured for controlled quiescent current. 2. The system of claim 1 wherein the feedback circuit is designed to present a different current gain for a rising and a falling slope of the column line output voltage. 3. The system of claim 1 wherein the feedback circuit is designed to have a transfer function with two linear segments, each having a different slope. 4. The system of claim 3 wherein an inflection point between the two linear segments is defined by a reference current generated within the feedback circuit. 5. The system of to claim 4 , wherein the classAB current mirror comprises a push-pull current mirror stage where a ratio of a first pair of transistors determines a gain for currents above the reference current and a ratio of a second pair of transistors determines a gain for currents below the reference current. 6. The system of claim 5 , wherein the first pair of transistors are PMOS transistors and the second pair of transistors are NMOS transistors. 7. The system of claim 1 , wherein the classAB current mirror comprises a pair of transistors to control the quiescent current according to a Monticelli bias scheme. 8. The system of claim 7 , wherein the classAB current mirror comprises a bypass capacitor connected between two gate voltage sources of a plurality of classAB stage transistors. 9. The system of claim 1 , wherein the current sensing circuit is implemented as a low-swing current mirror designed to reduce its input impedance to the supply line at a first connection node. 10. The system of claim 8 , wherein the impedance at the first connection node between the supply line and the current sensing circuit is designed to be lower than a second connection node between the feedback circuit and the column line, such as to obtain a non-dominant pole at the first connection node. 11. An electronic device comprising an active pixel sensor imaging system according to claim 1 .

Assignees

Inventors

Classifications

  • H04N25/709Primary

    Circuitry for control of the power supply · CPC title

  • Addressed sensors, e.g. MOS or CMOS sensors · CPC title

  • H03F3/505Primary

    with field-effect devices · CPC title

  • the source follower has a controlled source circuit, the controlling signal being derived from the drain circuit of the follower · CPC title

  • using opto-couplers between stages · CPC title

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What does patent US9344655B2 cover?
An active pixel sensor imaging system is disclosed. In one aspect, the system includes a plurality of active pixel sensor circuits arranged into an array of rows and columns. Each active pixel sensor is connected to a supply line and a column line, and operable to generate a voltage output through the column line corresponding to a detected light intensity. The system includes a current sensing…
Who is the assignee on this patent?
Imec Vzw
What technology area does this patent fall under?
Primary CPC classification H04N25/709. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 17 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).