Communication device with power supply load variation noise reduction for envelope tracking and method therefor

Patent metadata

Field	Value
Publication number	US-9344304-B1
Application number	US-201414575695-A
Country	US
Kind code	B1
Filing date	Dec 18, 2014
Priority date	Dec 18, 2014
Publication date	May 17, 2016
Grant date	May 17, 2016

Abstract

A switching apparatus comprises a number of instantiations of switching load cells operating at a first voltage and at a second voltage to switch a digital structure. The instantiations are turned on by a respective control bits. Each load cell comprises a charging capacitor coupled to a power amplifier. An output node can be coupled to a load capacitance. Switching circuitry couples the charging capacitor to the load capacitance and connects a voltage regulator to the output node to regulate voltage to the second voltage. The timing logic couples the charging capacitor to the first voltage, couples the charging capacitor to the load capacitance and disconnects the first voltage from the charging capacitor during a switching event, disconnects the charging capacitor from the load capacitance and connects the voltage regulator to the output node after the switching event. The apparatus may be embodied in envelope tracking.

First claim

The invention claimed is:

1. A switching apparatus for switching a digital structure, the switching apparatus comprising:
a plurality of instantiations of switching load cells configured to operate at a first voltage and at a second voltage to switch digital signals, each of the plurality of switching load cells configured to be turned on by a respective bit of a digital data signal that controls the digital structure, each switching load cell comprising:
a charging capacitor configured to be coupled to a power amplifier;
an output node configured to be coupled to a load capacitance;
a switching circuitry configured to couple the charging capacitor to the load capacitance and connect a voltage regulator to the output node to regulate voltage at the output node to the second voltage during a switching event, wherein during the switching event the charging capacitor is detached from the first voltage, and the ratio between the charging capacitor and the load capacitance creates a desired value of the second voltage; and
a signal source configured to provide the digital data signal.

2. The switching apparatus of claim 1 wherein the switching apparatus configures a number of the plurality of instantiations of switching load cells based on a number of bits of the digital data signal, the second voltage is lower than the first voltage, and the switching circuitry is further configured to:
couple the charging capacitor to the first voltage,
couple the charging capacitor to the load capacitance and disconnect the first voltage from the charging capacitor during the switching event,
disconnect the charging capacitor from the load capacitance, and
connect the voltage regulator to the output after the switching event to provide a desired spectral noise signal.

3. The switching apparatus of claim 2 wherein the switching circuitry comprises a P-type Metal Oxide Semiconductor (PMOS) gate.

4. The switching apparatus of claim 2 wherein the switching circuitry comprises a plurality of switching circuits.

5. The switching apparatus of claim 2 wherein the second voltage is created by a capacitive charge between the load capacitance and the charging capacitor.

6. The switching apparatus of claim 1 wherein the ratio of the charging capacitor to the load capacitance is based on a ratio of the second voltage divided by the difference between the first voltage and the second voltage.

7. The switching apparatus of claim 2 wherein the voltage regulator is a low dropout regulator that absorbs charge error created by mismatch and non linearities.

8. The switching apparatus of claim 2 wherein each switching load cell has a respective charging capacitor value.

9. The switching apparatus of claim 2 wherein a ratio of the charging capacitor to the load capacitance is approximately 1.25.

10. An envelope tracking apparatus comprising:
a power amplifier (PA) configured to be coupled to a source of digital signals;
a plurality of instantiations of switching load cells configured to be switched to operate at a first voltage and at a second voltage for switching the digital signals, each of the plurality of switching load cells configured to be turned on by a bit of a digital control signal, each switching load cell comprising:
a charging capacitor configured to be coupled to the PA,
an output node configured to be coupled to a load capacitance, and
switching circuitry configured to couple the charging capacitor to the load capacitance and connect a voltage regulator to the output node to regulate voltage at the output node to the second voltage;

a switch control coupled to the PA and configured to switch the PA between the first voltage and the second voltage during a switching event to track an envelope; and
a bypass capacitor coupled to the plurality of the switching load cells, the capacitance of the capacitor being at least about a sum of the charging capacitors of the plurality of the switching load cells that are turned on.

11. The envelope tracking apparatus of claim 10 wherein the number of the plurality of instantiations of switching load cells is based on a number of bits of the digital control signal, the second voltage is lower than the first voltage, and the switching circuitry is further configured to:
couple the charging capacitor to the first voltage,
couple the charging capacitor to the load capacitance and disconnect the first voltage from the charging capacitor during the switching event,
disconnect the charging capacitor from the load capacitance, and
connect the voltage regulator to the output node after the switching event to provide a desired spectral noise signal.

12. The envelope tracking apparatus of claim 11 wherein the switching circuitry comprises a P-type Metal Oxide Semiconductor (PMOS) gate.

13. The envelope tracking apparatus of claim 11 wherein the switching circuitry comprises a plurality of switching circuits.

14. The envelope tracking apparatus of claim 11 wherein the second voltage is created by the capacitive charge between the load capacitance and the charging capacitor.

15. The envelope tracking apparatus of claim 11 wherein the ratio of the charging capacitor to the load capacitance of each switching load cell is based on the ratio of the value of the second voltage divided by the difference between the value of the first voltage and the value of the second voltage.

16. The envelope tracking apparatus of claim 11 wherein the regulator is a low dropout regulator that absorbs charge error created by mismatch and non linearities.

17. The envelope tracking apparatus of claim 11 wherein each switching load cell of the plurality switching load cells has a respective charging capacitor value.

18. A transmitter comprising:
a circuitry to generate at least one multiplexed signal for transmission; and
an envelope tracking apparatus coupled to the circuitry and comprising:
a power amplifier (PA) configured to be coupled to a source of digital signals to be switched;
a plurality of instantiations of switching load cells configured to operate at a first voltage and at a second voltage for switching the digital signals, each of the plurality of switching load cells configured to be turned on by a bit of a digital control signal during a switching event of at least some of the digital signals, each switching load cell comprising:
a charging capacitor configured to be coupled to the PA;
an output node configured to be coupled to a load capacitance; and
switching circuitry configured to couple the charging capacitor to the load capacitance and connect a voltage regulator to the output node to regulate voltage at the output node to the second voltage;

a switch control coupled to the PA and configured to switch the PA between the first voltage and the second voltage during each switching event to track an envelope; and
a bypass capacitor coupled to the plurality of the switching load cells, the capacitance of the capacitor being at least about a sum of the charging capacitors of the plurality of the switching load cells that are turned on.

19. The transmitter of claim 18 wherein the number of the plurality of instantiations of switching load cells is based on a number of bits of the digital control signal, the second voltage is lower than the first voltage, and the switching circuitry is further configured to:
couple the charging capacitor to the first voltage,
couple the charging capacitor to the load capacitance and disconnect the first voltage from the charging capacitor during the switching

Assignees

• Intel Ip Corp

Inventors

• Cohen Emanuel

Classifications

• H03F2200/102

  A non-specified detector of a signal envelope being used in an amplifying circuit · CPC title

• H04L27/2626 Primary

  Arrangements specific to the transmitter only · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03F3/217

  Class D power amplifiers; Switching amplifiers · CPC title

• H03F3/19

  with semiconductor devices only · CPC title