Semiconductor device including a gate electrode on a protruding group III-V material layer and method of manufacturing the semiconductor device

Patent metadata

Field	Value
Publication number	US-9343564-B2
Application number	US-201514718968-A
Country	US
Kind code	B2
Filing date	May 21, 2015
Priority date	Nov 15, 2011
Publication date	May 17, 2016
Grant date	May 17, 2016

Abstract

A semiconductor device including a group III-V barrier and a method of manufacturing the semiconductor device, the semiconductor device including: a substrate, insulation layers formed to be spaced apart on the substrate, a group III-V material layer for filling the space between the insulation layers and having a portion protruding higher than the insulation layers, a barrier layer for covering the side and upper surfaces of the protruding portion of the group III-V material layer and having a bandgap larger than that of the group III-V material layer, a gate insulation film for covering the surface of the barrier layer, a gate electrode formed on the gate insulation film, and source and drain electrodes formed apart from the gate electrode. The overall composition of the group III-V material layer is uniform. The barrier layer may include a group III-V material for forming a quantum well.

First claim

What is claimed is:

1. A semiconductor device comprising:
a substrate;
a group III-V material layer comprising a defect-free portion and a portion including defect;
a barrier layer connected to the defect-free portion;
a gate insulation film on the barrier layer;
a gate electrode on the gate insulation film; and
source and drain electrodes disposed apart from the gate electrode,
wherein the barrier layer is not connected to the portion including the defect of the group III-V material layer; and
wherein an overall composition of the group III-V material layer is substantially uniform.

2. The semiconductor device of claim 1 , wherein the barrier layer comprises a group III-V material forming a quantum well.

3. The semiconductor device of claim 1 , wherein the source and drain electrodes contact the barrier layer and the gate insulation film.

4. The semiconductor device of claim 1 , wherein the defect-free portion comprises a protruded portion.

5. The semiconductor device of claim 1 , wherein the barrier layer is a compound semiconductor layer including at least one group III element and at least one group V element.

6. The semiconductor device of claim 1 , the portion including defect is surrounded by an insulating layer.

7. The semiconductor device of claim 1 , the barrier layer has a bandgap larger than that of the group III-V material layer.

Assignees

• Cho Young-Jin
• Kim Kyoung-Yeon
• Lee Sang-Moon
• Hong Ki-Ha
• Hwang Eui-Chul
• Samsung Electronics Co Ltd

Inventors

• Cho Young-Jin
• Kim Kyoung-Yeon
• Lee Sang-Moon
• Hong Ki-Ha
• Hwang Eui-Chul

Classifications

• H10P14/3414

  being group IIIA-VIA materials · CPC title

• H10P10/00

  Bonding of wafers, substrates or parts of devices · CPC title

• H10D64/518

  characterised by their lengths or sectional shapes · CPC title

• H10D62/8181

  Structures having no potential periodicity in the vertical direction, e.g. lateral superlattices or lateral surface superlattices [LSS] · CPC title

• H10D62/824

  comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions · CPC title