Semiconductor devices and methods of fabricating the same

Patent metadata

Field	Value
Publication number	US-9343476-B2
Application number	US-201414469611-A
Country	US
Kind code	B2
Filing date	Aug 27, 2014
Priority date	Aug 28, 2013
Publication date	May 17, 2016
Grant date	May 17, 2016

Abstract

The inventive concepts provide semiconductor devices and methods of fabricating the same. According to the method, sub-stack structures having a predetermined height and active holes are repeatedly stacked. Thus, cell dispersion may be improved, and various errors such as a not-open error caused in an etching process may be prevented. A grain size of an active pillar used as channels may be increased or maximized using a metal induced lateral crystallization method, so that a cell current may be improved. A formation position of a metal silicide layer including a crystallization inducing metal may be controlled such that a concentration grade of the crystallization inducing metal may be controlled depending on a position within the active pillar.

First claim

What is claimed is:

1. A semiconductor device comprising:
a stack structure on a substrate, the stack structure including conductive lines and insulating layers that are alternately stacked;
an active pillar that penetrates the stack structure; and
a crystallization inducing metal doped in the active pillar,
wherein a doping concentration of the crystallization inducing metal in the active pillar varies depending on a height from a bottom surface of the active pillar,
wherein a sidewall of the active pillar is substantially non-linear,
wherein the active pillar comprises:
an active plug adjacent the substrate; and
an active shell having a hollow cup-shape on the active plug, and
wherein the doping concentration of the crystallization inducing metal at a bottom surface of the active shell is higher than the doping concentration of the crystallization inducing metal at a sidewall of the active shell.

2. A semiconductor device comprising:
a stack structure on a substrate;
an active pillar that penetrates the stack structure; and
a crystallization inducing metal doped in the active pillar,
wherein a doping concentration of the crystallization inducing metal in the active pillar varies depending on a height from a bottom surface of the active pillar, wherein the active pillar comprises:
an active plug adjacent the substrate; and
an active shell having a hollow cup-shape on the active plug, and
wherein the doping concentration of the crystallization inducing metal at a bottom surface of the active shell is higher than the doping concentration of the crystallization inducing metal at a sidewall of the active shell.

3. The semiconductor device of claim 2 , wherein the active pillar further comprises a first active pad disposed on a top end of the active shell and having a disk-shaped plane.

4. The semiconductor device of claim 3 , wherein the doping concentration of the crystallization inducing metal at a top surface of the first active pad is higher than the doping concentration of the crystallization inducing metal at the sidewall of the active shell.

5. The semiconductor device of claim 3 , wherein the active pillar further comprises at least one second active pad disposed between the first active pad and the active plug.

6. The semiconductor device of claim 5 , wherein the doping concentration of the crystallization inducing metal at an interface between the active shell and the second active pad is higher than the doping concentration of the crystallization inducing metal at the sidewall of the active shell.

7. The semiconductor device of claim 1 , wherein the stack structure includes a plurality of sub-stack structures,
wherein each of the sub-stack structures includes the conductive layers and the insulating layers that are alternately stacked,
wherein the active pillar penetrates the sub-stack structures, and
wherein a sidewall of the active pillar adjacent an interface between the sub-stack structures is substantially non-linear.

8. The semiconductor device of claim 1 , wherein the active pillar includes poly-silicon having a grain size of about 1 μm or more.

9. A semiconductor device comprising:
a plurality of sub-stack structures that are arranged sequentially on a substrate; and
an active pillar that penetrates the plurality of sub-stack structures and to contact the substrate, the active pillar comprising a crystallization inducing metal doped therein,
wherein a doping concentration of the crystallization inducing metal in the active pillar varies depending on a height from the substrate,
wherein the active pillar comprises an active plug adjacent the substrate, an active shell having a hollow cup-shape on the active plug, a first active pad on a top end of the active shell and having a disk-shaped plane, and at least one second active pad disposed between the first active pad and the active plug,
wherein the active plug is between the active shell and the substrate, and
wherein the doping concentration of the crystallization inducing metal at a bottom surface of the active shell is higher than the doping concentration of the crystallization inducing metal at a sidewall of the active shell.

10. The semiconductor device according to claim 9 , wherein the doping concentration of the crystallization inducing metal at a top surface of the first active pad is higher than the doping concentration of the crystallization inducing metal at a sidewall of the active shell.

11. The semiconductor device according to claim 9 , wherein the doping concentration of the crystallization inducing metal at an interface between the active shell and the second active pad is higher than the doping concentration of the crystallization inducing metal at a sidewall of the active shell.

12. The semiconductor device of claim 1 , wherein the active pillar further comprises a first active pad disposed on a top end of the active shell and having a disk-shaped plane.

13. The semiconductor device of claim 12 , wherein the doping concentration of the crystallization inducing metal at a top surface of the first active pad is higher than the doping concentration of the crystallization inducing metal at the sidewall of the active shell.

Assignees

• Seo Yujeong
• Park Jintaek
• Park Youngwoo
• Samsung Electronics Co Ltd

Inventors

• Seo Yujeong
• Park Jintaek
• Park Youngwoo

Classifications

• H10P14/3411

  Silicon, silicon germanium or germanium · CPC title

• H10D62/83

  being Group IV materials, e.g. B-doped Si or undoped Ge · CPC title

• H10P14/3806 Primary

  using crystallisation-enhancing elements · CPC title

• H10D62/40

  Crystalline structures · CPC title

• H10B41/35 Primary

  with a cell select transistor, e.g. NAND · CPC title