Semiconductor fabrication process

US9340880B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9340880-B2
Application numberUS-201414464748-A
CountryUS
Kind codeB2
Filing dateAug 21, 2014
Priority dateOct 27, 2009
Publication dateMay 17, 2016
Grant dateMay 17, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Semiconductor fabrication processes are described. An embodiment of the semiconductor fabrication process includes providing a layer formed by decomposition of dimethylsilane through chemical vapor deposition, the layer being applied by a fluid material, and then positioning the layer in a system for producing a semiconductor product. Additionally or alternatively, the semiconductor product is produced and/or the layer is on a substrate.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor fabrication process, comprising: providing a coated article, the coated article having a substrate and a layer applied to the substrate by decomposition and then oxidization of dimethylsilane through chemical vapor deposition, the layer applied by a fluid material; and then positioning the coated article in a system for producing a semiconductor product. 2. The process of claim 1 , wherein the layer is applied to an oxidized layer, a pretreated layer, or a combination thereof. 3. The process of claim 2 , wherein the oxidized layer includes an oxidized carbosilane material. 4. The process of claim 2 , wherein the oxidized layer is formed by water, zero air, or a combination thereof. 5. The process of claim 2 , wherein the oxidized layer includes oxidized dimethylsilane. 6. The process of claim 5 , wherein the layer includes trimethylsilane applied to the oxidized dimethylsilane. 7. The process of claim 1 , wherein the fluid material is a gas. 8. The process of claim 1 , wherein the fluid material is a plasma. 9. The process of claim 1 , wherein the coated article is a tube and the layer is an internal surface of the tube. 10. The process of claim 1 , wherein the coated article is a fitting and the layer is an internal surface of the fitting. 11. The process of claim 1 , wherein the coated article is a pipe and the layer is an internal surface of the pipe. 12. The process of claim 1 , wherein the coated article is a chamber and the layer is an internal surface of the chamber wall. 13. The process of claim 1 , wherein the semiconductor product comprises a crystalline solid, a poly-crystalline material, or an amorphous material. 14. The process of claim 1 , wherein the semiconductor product includes an intrinsic semiconductor. 15. The process of claim 1 , wherein the semiconductor product includes an extrinsic semiconductor having a positive charge conductor. 16. The process of claim 1 , wherein the semiconductor product is selected from the group consisting of a pure element semiconductor and a compound semiconductor. 17. The process of claim 1 , wherein the semiconductor product includes a surface consisting of indium antimonide (InSb), indium arsenide (InAs), indium phosphide (InP), gallium phosphide (GaP), gallium antimonide (GaSb), gallium arsenide (GaAs), silicon carbide (SiC), gallium nitride (GaN), silicon germanium (SiGe), or selenium sulfide (SeS). 18. A semiconductor fabrication process, comprising: providing a coated article, the coated article having a substrate and a layer applied to the substrate by decomposition and then oxidization of dimethylsilane through chemical vapor deposition, the layer applied by a fluid material; and then positioning the coated article in a system; and then producing a semiconductor product from the system. 19. A semiconductor fabrication process, comprising: providing a layer applied by decomposition and then oxidization of dimethylsilane through chemical vapor deposition, the layer applied by a fluid material; and then positioning the layer in a system; and then producing a semiconductor product from the system.

Assignees

Inventors

Classifications

  • characterised by the deposition of inorganic material, other than metallic material · CPC title

  • C23C16/56Primary

    After-treatment · CPC title

  • Features of coating compositions, not provided for in group C09D5/00 (driers C09F9/00); Processes for incorporating ingredients in coating compositions · CPC title

  • Deposition of organic layers from vapour phase (vapour phase deposition in general C23C14/00, C23C16/00) · CPC title

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What does patent US9340880B2 cover?
Semiconductor fabrication processes are described. An embodiment of the semiconductor fabrication process includes providing a layer formed by decomposition of dimethylsilane through chemical vapor deposition, the layer being applied by a fluid material, and then positioning the layer in a system for producing a semiconductor product. Additionally or alternatively, the semiconductor product is …
Who is the assignee on this patent?
Silcotek Corp
What technology area does this patent fall under?
Primary CPC classification C23C16/56. Mapped technology areas include Chemistry & Metallurgy.
When was this patent published?
Publication date Tue May 17 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).