Device and method for channel estimation and signal demodulation

Patent metadata

Field	Value
Publication number	US-9338032-B2
Application number	US-201314093769-A
Country	US
Kind code	B2
Filing date	Dec 2, 2013
Priority date	Dec 2, 2013
Publication date	May 10, 2016
Grant date	May 10, 2016

Abstract

A device includes an input configured to receive a signal, wherein the signal includes at least one data block and a plurality of signal parts known to the device, a first signal part at the beginning of the data block and a second signal part at the end of the data block. The device further includes an equalizer and a pre-equalizer coupled between the input and the equalizer, wherein the pre-equalizer is configured to estimate a phase shift between the plurality of signal parts.

First claim

What is claimed is:

1. A device, comprising:
an input configured to receive a signal, wherein the signal comprises a structure comprising at least one data block and a plurality of signal parts known to the device, a first signal part at the beginning of the data block and a second signal part at the end of the data block;
an equalizer;
a pre-equalizer coupled between the input and the equalizer, wherein the pre-equalizer is configured to estimate a phase shift between the plurality of signal parts; and
a tracking circuit configured to:
receive the estimated phase shift and a frequency offset estimate,
generate a phase tracking based on the estimated phase shift and the frequency offset estimate, and
provide the generated phase tracking to the equalizer.

2. The device of claim 1 , wherein the plurality of signal parts are a signal part out of a guard interval and a signal part of a Golay sequence.

3. The device of claim 1 , wherein the pre-equalizer is further configured to correct a phase of the data block using the estimated phase shift.

4. The device of claim 3 , wherein the pre-equalizer is further configured to correct the signal phase by linear interpolation.

5. The device of claim 1 , wherein the tracking circuit comprises: a numerically controlled oscillator, wherein the tracking circuit is further configured to control the numerically controlled oscillator depending on the estimated phase shift and a frequency offset estimate.

6. The device of claim 5 , wherein the tracking circuit is configured to compute a block's common phase error to compensate for phase error, and compute a block's timing error and a phase slope to compensate for timing error.

7. The device of claim 5 , wherein the tracking circuit is coupled to the equalizer to provide channel estimation blocks reference values to a correlator and equalization coefficients to the equalizer.

8. The device of claim 1 , further comprising a post-equalizer coupled to an output of the equalizer, wherein the post-equalizer is configured to estimate a phase error of the equalized signal.

9. The device of claim 8 , wherein the tracking circuit is configured to receive the estimated post equalizer phase error.

10. The device of claim 9 , wherein the tracking circuit is further configured to calculate a time tracking correction.

11. The device of claim 10 , wherein the tracking circuit is further configured to receive a frequency offset estimate, wherein the tracking circuit is configured to calculate the time tracking correction based on the frequency offset estimate.

12. The device of claim 1 , wherein the device comprises a single carrier receiver configured to receive a single carrier signal which comprises a channel estimation field comprising two blocks built of Golay sequences, wherein the single carrier signal further comprises a payload comprising data blocks which are separated by guard intervals.

13. The device of claim 1 , wherein the tracking circuit is further configured to:
receive a phase error of an equalized signal equalized by the equalizer; and
generate the phase tracking based on the frequency offset estimate, the estimated phase shift, and the phase error.

14. A method of demodulating a signal received over a wireless local area network, the method comprising:
receiving the signal, wherein the signal comprises a structure comprising at least one data block and a plurality of signal parts known to the receiver, a first signal part at the beginning of the data block and a second signal part at the end of the data block;
estimating a phase shift for the data block between the plurality of signal parts;
generating phase tracking based on a received frequency offset estimate and the estimated phase shift;
correcting the data block by the estimated phase shift; and
providing the corrected data block and the phase tracking to an equalizer.

15. The method of claim 14 , wherein the equalizer is configured to output an equalized signal and the method further comprises estimating a post equalizer phase error of the equalized signal.

16. The method of claim 15 , further comprising:
utilizing the estimated post equalizer phase error, the frequency offset estimate, and the estimated phase shift for phase tracking in the equalizer.

17. A method of demodulating a signal, the method comprising:
receiving a signal, wherein the signal has a structure comprising a data block and a plurality of signal parts known to the receiver, a first signal part at the beginning of the data block and a second signal part at the end of the data block;
estimating a phase shift for the data block;
generating phase tracking based on a received frequency offset estimate and the estimated phase shift;
equalizing, using an equalizer, the signal based on the phase tracking to generate an equalized signal;
estimating a phase error of the equalized signal; and
utilizing the estimated phase error of the equalized signal for phase correction in the post equalizer, wherein a post equalizer phase correction includes calculating a phase error over subblocks of the equalized data block, and utilizing the respective phase errors of the sub-blocks to determine phase error of each symbol.

18. The method of claim 17 , wherein the phase error of each symbol is calculated as a linear combination of the sub-block phase errors.

Assignees

• Genossar Michael
• Kaver Yaniv
• Kravtsov Vladimir
• Lemberger Uriel
• Intel Ip Corp

Inventors

• Genossar Michael
• Kaver Yaniv
• Kravtsov Vladimir
• Lemberger Uriel

Classifications

• H04L25/0224

  using sounding signals · CPC title

• H04L25/0202 Primary

  Channel estimation · CPC title

• H04L25/03038

  with a non-recursive structure (H04L25/03031 takes precedence) · CPC title

• H04L2027/0042

  the equaliser providing the offset correction per se · CPC title