Static MEMS switch for ESD protection

Patent metadata

Field	Value
Publication number	US-9337653-B2
Application number	US-201313966813-A
Country	US
Kind code	B2
Filing date	Aug 14, 2013
Priority date	Aug 14, 2012
Publication date	May 10, 2016
Grant date	May 10, 2016

Abstract

An integrated circuit with either a normally open MEMS ESD protection switch coupled between a bond pad and an internal circuit or a normally closed MEMS ESD protection switch coupled between the bond pad and a common reference of the integrated circuit. At least one of a control bond pad and an enable logic circuit is coupled to a control terminal of the MEMS ESD protection switch.

First claim

What is claimed is:

1. An integrated circuit, comprising:
an internal circuit;
a first bond pad coupled to said internal circuit;
a first normally closed MEMS ESD protection switch coupled between said first bond pad and a common reference of said internal circuit, said first normally closed MEMS ESD protection switch comprising a first input/output terminal, a second input/output terminal, and a control terminal, the first normally closed MEMS ESD protection switch further comprising:
a cantilever arm coupled to a ground terminal at a first end, the cantilever arm comprising an electrically conductive material;
an electrically conductive bar over a second end of the cantilever arm, the electrically conductive bar vertically aligned with both the first input/output terminal and the second input/output terminal as well as the electrically conductive material of the cantilever arm, wherein the cantilever arm extends over the control terminal at a location between the first end and the second end and the electrically conductive material of the cantilever arm is vertically and electrically isolated from the electrically conductive bar at the second end by a dielectric layer; and

at least one of a control bond pad coupled to said control terminal of said first normally closed MEMS ESD protection switch and an enable logic circuit coupled to said control terminal of said first normally closed MEMS ESD protection switch.

2. The integrated circuit of claim 1 , further comprising a delay circuit coupled to said control terminal of said first normally closed MEMS ESD protection switch, said least one of said control bond pad and said enable logic circuit being coupled to said control terminal of said first normally closed MEMS ESD protection switch through said delay circuit.

3. The integrated circuit of claim 1 , further comprising:
a second bond pad coupled to said internal circuit; and
a second normally closed MEMS ESD protection switch coupled between said second bond pad and said common reference of said internal circuit, said second normally closed MEMS ESD protection switch comprising a first input/output terminal, a second input/output terminal, and a control terminal, in which said at least one of said control bond pad and said enable logic circuit is coupled to said control terminal of said second normally closed MEMS ESD protection switch.

4. The integrated circuit of claim 1 , further comprising an ESD circuit coupled in series between said first normally closed MEMS ESD protection switch and said common reference of said integrated circuit.

5. The integrated circuit of claim 4 , further comprising:
a second bond pad coupled to said internal circuit; and
a second normally closed MEMS ESD protection switch coupled between said second bond pad and said ESD circuit, said second normally closed MEMS ESD protection switch comprising a first input/output terminal, a second input/output terminal, and a control terminal, in which said at least one of said control bond pad and said enable logic circuit is coupled to said control terminal of said second normally closed MEMS ESD protection switch.

6. The integrated circuit of claim 1 , in which said common reference is a substrate of said integrated circuit.

7. The integrated circuit of claim 1 , in which said common reference is a Vss bus of said integrated circuit.

Assignees

• Texas Instruments Inc

Inventors

• Brodsky Jonathan Scott
• Kunz Jr John Eric

Classifications

• H02H9/046 Primary

  responsive to excess voltage appearing at terminals of integrated circuits · CPC title