Compact distributed bragg reflectors

US9337622B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9337622-B2
Application numberUS-201414334770-A
CountryUS
Kind codeB2
Filing dateJul 18, 2014
Priority dateJul 18, 2014
Publication dateMay 10, 2016
Grant dateMay 10, 2016

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Abstract

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Ultra compact DBRs, VCSELs incorporating the DBRs and methods for making the DBRs are provided. The DBRs are composed of a vertical reflector stack comprising a plurality of adjacent layer pairs, wherein each layer pair includes a layer of single-crystalline Group IV semiconductor and an adjacent layer of silicon dioxide.

First claim

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What is claimed is: 1. A distributed Bragg reflector comprising: a reflector stack comprising at least two adjacent layer pairs, each layer pair comprising: a layer of a single-crystalline Group IV semiconductor having a surface; and an adjacent layer of silicon dioxide having a surface; wherein the surface of the layer of single-crystalline Group IV semiconductor and the surface of the adjacent layer of silicon dioxide form an interface between the layer of single-crystalline Group IV semiconductor and the adjacent layer of silicon dioxide; wherein the thickness of the reflector stack is no greater than 1 μm; the root mean square roughness of the interface formed by the layer of single-crystalline Group IV semiconductor and the layer of silicon dioxide of the first of the at least two adjacent layer pairs is no greater than 0.5 nm; and the root mean square roughness of the interface formed by the layer of single-crystalline Group IV semiconductor and the layer of silicon dioxide of the second of the at least two adjacent layer pairs is no greater than 0.5 nm. 2. The reflector of claim 1 , wherein the thickness of each layer pair is no greater than 450 nm and the layers of silicon dioxide are at least twice as thick as the layers of single-crystalline silicon. 3. The reflector of claim 1 , the reflector stack having from two and a half to three adjacent layer pairs. 4. The reflector of claim 1 , wherein the single-crystalline Group IV semiconductor of each layer pair silicon. 5. The reflector of claim 4 , wherein the thickness of each layer pair is no greater than 650 nm and the layers of silicon dioxide are at least twice as thick as the layers of single-crystalline silicon. 6. The reflector of claim 5 , wherein the layers of single-crystalline silicon have a thickness of about 110 nm and the layers of silicon dioxide have a thickness of about 270 nm and further wherein the reflector reflects light having a wavelength of 1.55 μm. 7. The reflector of claim 4 , wherein the reflector has only three layer pairs and is characterized in that that it provides a reflectivity of at least 99.5% at a wavelength within the range from 1400 to 1670 nm on a silicon substrate. 8. The reflector of claim 4 , the reflector stack comprising only two complete layer pairs and further comprising a layer of single-crystalline silicon on the second complete layer pair to provide a stack of 2.5 layer pairs, wherein the reflector is characterized in that that it provides a reflectivity of at least 99.6% at a wavelength of 1550 nm on a quartz substrate. 9. The reflector of claim 1 , wherein the single-crystalline Group IV semiconductor of each layer pair is germanium. 10. The reflector of claim 1 , further comprising a substrate on which the stack of layer pairs is disposed, such that the lowermost layer of single-crystalline silicon in the stack is in contact with the substrate. 11. The reflector of claim 10 , wherein the substrate is not silicon. 12. The reflector of claim 1 , the reflector stack characterized in that it provides a reflectivity of at least 99.4% over the wavelength range from 1400 nm to 1670 nm on a silicon or quartz substrate. 13. An array of reflectors comprising a plurality of the reflectors of claim 1 on a substrate, wherein different reflectors in the array are configured to reflect light over different wavelength ranges. 14. The distributed Bragg reflector of claim 1 , wherein the silicon dioxide of each layer pair is not a spin-on-glass type silicon oxide comprising mixtures of non-stoichiometric silicon oxides. 15. A distributed Bragg reflector comprising: a reflector stack comprising at least two adjacent layer pairs, each layer pair comprising: a layer of a single-crystalline Group IV semiconductor having a surface; and an adjacent layer of silicon dioxide having a surface; wherein the surface of the layer of single-crystalline Group IV semiconductor and the surface of the adjacent layer of silicon dioxide form an interface between the layer of single-crystalline Group IV semiconductor and the adjacent layer of silicon dioxide; wherein the root mean square roughness of the interface formed by the layer of single-crystalline Group IV semiconductor and the layer of silicon dioxide of the first of the at least two adjacent layer pairs is no greater than 0.5 nm; and the root mean square roughness of the interface formed by the layer of single-crystalline Group IV semiconductor and the layer of silicon dioxide of the second of the at least two adjacent layer pairs is no greater than 0.5 nm; wherein the layers of single-crystalline silicon have a thickness of about 175 nm and the layers of silicon dioxide have a thickness of about 435 nm and further wherein the reflector reflects light having a wavelength of 0.98 μm. 16. The distributed Bragg reflector of claim 15 , wherein the silicon dioxide of each layer pair is not a spin-on-glass type silicon oxide comprising mixtures of non-stoichiometric silicon oxides. 17. A vertical cavity surface emitting laser comprising: a lower distributed Bragg reflector comprising: a reflector stack comprising at least two adjacent layer pairs, each layer pair comprising: a layer of a single-crystalline Group IV semiconductor having a surface; and an adjacent layer of silicon dioxide having a surface; wherein the surface of the layer of single-crystalline Group IV semiconductor and the surface of the adjacent layer of silicon dioxide form an interface between the layer of single-crystalline Group IV semiconductor and the adjacent layer of silicon dioxide; wherein the thickness of the reflector stack is no greater than 1 μm; the root mean square roughness of the interface formed by the layer of single-crystalline Group IV semiconductor and the layer of silicon dioxide of the first of the at least two adjacent layer pairs is no greater than 0.5 nm; and the root mean square roughness of the interface formed by the layer of single-crystalline Group IV semiconductor and the layer of silicon dioxide of the second of the at least two adjacent layer pairs is no greater than 0.5 nm; an upper distributed Bragg reflector comprising: a reflector stack comprising least two adjacent layer pairs, each layer pair comprising: a layer of a single-crystalline Group IV semiconductor having a surface; and an adjacent layer of silicon dioxide having a surface; wherein the surface of the layer of single-crystalline Group IV semiconductor and the surface of the adjacent layer of silicon dioxide form an interface between the layer of single-crystalline Group IV semiconductor and the adjacent layer of silicon dioxide; wherein the thickness of the reflector stack is no greater than 1 μm; the root mean square roughness of the interface formed by the layer of single-crystalline Group IV semiconductor and the layer of silicon dioxide of the first of the at least two adjacent layer pairs is no greater than 0.5 nm; and the root mean square roughness of the interface formed by the layer of single-crystalline Group IV semiconductor and the layer of silicon dioxide of the second of the at least two adjacent layer pairs is no greater than 0.5 nm; and a light-emitting active layer disposed between the lower distributed Bragg reflector and the upper distributed Bragg reflector. 18. The laser of claim 17 , wherein the lower and upper distributed Bragg reflectors provide a reflectivity of at least 99.4% for light emitted by the active region in the wavelength range from 1300 nm to 1700 nm. 19. The laser of claim 17 , wherein the inne

Assignees

Inventors

Classifications

  • Electrical excitation {; Circuits therefor (monolithically integrated laser drive components H01S5/0261)} · CPC title

  • H01S5/187Primary

    using Bragg reflection · CPC title

  • having a vertical cavity · CPC title

  • having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] · CPC title

  • by native oxidation · CPC title

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What does patent US9337622B2 cover?
Ultra compact DBRs, VCSELs incorporating the DBRs and methods for making the DBRs are provided. The DBRs are composed of a vertical reflector stack comprising a plurality of adjacent layer pairs, wherein each layer pair includes a layer of single-crystalline Group IV semiconductor and an adjacent layer of silicon dioxide.
Who is the assignee on this patent?
Wisconsin Alumni Res Found
What technology area does this patent fall under?
Primary CPC classification H01S5/187. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 10 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).