Circuits for controlling display apparatus

Patent metadata

Field	Value
Publication number	US-9336732-B2
Application number	US-201213617112-A
Country	US
Kind code	B2
Filing date	Sep 14, 2012
Priority date	Feb 23, 2005
Publication date	May 10, 2016
Grant date	May 10, 2016

Abstract

The invention relates to methods and apparatus for forming images on a display utilizing a control matrix to control the movement of MEMs-based light modulators.

First claim

What is claimed is:

1. An electromechanical device
comprising: a substrate;
a light blocking element formed on the substrate and having a first actuator and a second actuator operatively opposing the first actuator for moving the light blocking element between at least a first position and a second position; and
a flip-flop circuit disposed on the substrate, wherein the flip-flop circuit includes a first inverter having an output coupled to the first actuator, and a second inverter having an output coupled to the second actuator, the flip-flop circuit being configured to maintain opposite logical states on the first and second actuators, the logical states corresponding to the position of the light blocking element, such that when the first actuator is in a first logical state, the flip-flop circuit maintains the second actuator in a second, opposite logical state, and when the first actuator is in the second logical state, the flip-flop circuit maintains the second actuator in the first logical state.

2. The electromechanical device of claim 1 , wherein the second inverter is cross-coupled with the first inverter, the first inverter having a first transistor and a second transistor, and the second inverter having a third transistor and a fourth transistor.

3. The electromechanical device of claim 2 , further comprising only one data voltage interconnect that carries an electrical signal corresponding to image data for the pixel to control both the first and second actuators.

4. The electromechanical device of claim 3 , further comprising a memory element for storing data associated with the position of the light blocking element and a data switch electrically coupled between the memory element and the data voltage interconnect.

5. The electromechanical device of claim 4 , the data switch being controlled by a scan-line interconnect, and the scan-line interconnect controlling a switch in a plurality of rows and columns of an array of pixels.

6. The electromechanical device of claim 4 , wherein the memory element includes a capacitor.

7. The electromechanical device of claim 1 , comprising a first data voltage interconnect for controlling the first actuator, and second data voltage interconnect for controlling the second actuator.

8. The electromechanical device of claim 1 , further comprising a pre-charge interconnect electrically coupled to the first and second inverter, the pre-charge interconnect being configured to provide a voltage to only one of the first and second actuators at a time for actuating the light blocking element.

9. The electromechanical device of claim 4 , wherein a gate of the first transistor and a gate of the fourth transistor are electrically coupled to the memory element, a gate of the second transistor is electrically coupled to the second actuator, and a gate of the third transistor is electrically coupled to the first actuator.

10. The electromechanical device of claim 1 , further comprising a level shifting inverter and a transition sharpening inverter electrically coupled to the flip-flop circuit.

11. The electromechanical device of claim 1 , wherein the light blocking element includes an electromechanical shutter.

12. The electromechanical device of claim 11 , further comprising at least one aperture formed on the substrate for passing light, wherein the first and second actuator move the electromechanical shutter relative to the aperture.

13. The electromechanical device of claim 1 , wherein the substrate includes a transparent substrate.

14. A method of operating an electromechanical device, comprising:
applying an electrical signal to a scan-line interconnect coupled to a gate of a data switch, thereby turning the data switch on;
loading data into at least one memory element electrically coupled between the data switch and a flip-flop circuit, wherein the data corresponds to a position of a light blocking element;
applying a voltage to a global actuation interconnect, wherein the voltage is substantially similar to a voltage applied to a shutter common interconnect thereby allowing the data to update a state of the flip-flop circuit; and
applying an actuation voltage to at least one of a first actuator and second actuator operatively opposing the first actuator, wherein the flip-flop circuit includes a first inverter having an output coupled to the first actuator, and a second inverter having an output coupled to the second actuator, the flip-flop circuit being configured to maintain opposite logical states on the first and second actuators, the logical states corresponding to the position of the light blocking element such that when the first actuator is in a first logical state, the flip-flop circuit maintains the second actuator in a second, opposite logical state, and when the first actuator is in the second logical state, the flip-flop circuit maintains the second actuator in the first logical state, thereby moving the light blocking element relative to an aperture in accordance with the logical state of the flip-flop circuit.

15. The method of claim 14 , wherein the actuation voltage includes a voltage selected to move the light blocking element.

16. The method of claim 14 , wherein the data includes a voltage of less than 8 volts.

Assignees

• Hagood Iv Nesbitt W
• Lewis Stephen R
• Mcallister Abraham
• Barton Roger W
• Payne Richard S
• Steyn Jasper Lodewyk
• Pixtronix Inc

Inventors

• Hagood Iv Nesbitt W
• Lewis Stephen R
• Mcallister Abraham
• Barton Roger W
• Payne Richard S
• Steyn Jasper Lodewyk

Classifications

• G09G2300/0809

  Several active elements per pixel in active matrix panels · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

• G09G3/3473 Primary

  based on light coupled out of a light guide, e.g. due to scattering, by contracting the light guide with external means · CPC title

• G09G2310/0235

  Field-sequential colour display · CPC title

• G09G2360/18

  Use of a frame buffer in a display terminal, inclusive of the display panel · CPC title